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Allow non-secure accesses only with SMMU peripherals. This would protect the content in DDR secure region from accidentally modified by SMMU peripherals. Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
40 lines
840 B
C
40 lines
840 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved
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* Copyright (C) 2025 Altera Corporation <www.altera.com>
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*
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*/
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#include <hang.h>
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#include <spl.h>
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#include <dm/uclass.h>
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DECLARE_GLOBAL_DATA_PTR;
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_MMC1;
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}
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#if IS_ENABLED(CONFIG_SPL_MMC)
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u32 spl_boot_mode(const u32 boot_device)
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{
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if (IS_ENABLED(CONFIG_SPL_FS_FAT) || IS_ENABLED(CONFIG_SPL_FS_EXT4))
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return MMCSD_MODE_FS;
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else
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return MMCSD_MODE_RAW;
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}
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#endif
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/* board specific function prior loading SSBL / U-Boot */
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void spl_perform_fixups(struct spl_image_info *spl_image)
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{
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int ret;
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struct udevice *dev;
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ret = uclass_get_device_by_name(UCLASS_NOP, "socfpga-smmu-secure-config", &dev);
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if (ret) {
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printf("HPS SMMU secure settings init failed: %d\n", ret);
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hang();
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}
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}
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