mirror of
https://github.com/u-boot/u-boot.git
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55c9e3e5b2
The u-boot.rom image contain u-boot.img FIT instead of the FIT generated by binman for the u-boot-rockchip.bin image. Change to include the binman generated FIT for the u-boot.rom image. This change result in TF-A being included and the use sha256 instead of crc32 checksum in the u-boot.rom FIT. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
203 lines
2.7 KiB
Text
203 lines
2.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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pci0 = &pcie0;
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spi1 = &spi1;
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};
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
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};
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pmusgrf: syscon@ff330000 {
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compatible = "rockchip,rk3399-pmusgrf", "syscon";
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reg = <0x0 0xff330000 0x0 0xe3d4>;
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bootph-all;
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};
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cic: syscon@ff620000 {
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compatible = "rockchip,rk3399-cic", "syscon";
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reg = <0x0 0xff620000 0x0 0x100>;
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bootph-all;
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};
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};
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#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
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&binman {
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multiple-images;
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rom {
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filename = "u-boot.rom";
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size = <0x400000>;
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pad-byte = <0xff>;
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mkimage {
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args = "-n rk3399 -T rkspi";
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multiple-data-files;
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#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
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rockchip-tpl {
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};
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#elif defined(CONFIG_TPL)
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u-boot-tpl {
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};
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#endif
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u-boot-spl {
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};
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};
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fit {
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type = "blob";
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filename = "u-boot.itb";
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offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
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};
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u-boot {
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offset = <0x300000>;
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};
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fdtmap {
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};
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};
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};
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#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
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&cru {
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bootph-all;
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};
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&dfi {
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bootph-all;
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};
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&dmc {
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reg = <0x0 0xffa80000 0x0 0x0800
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0x0 0xffa80800 0x0 0x1800
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0x0 0xffa82000 0x0 0x2000
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0x0 0xffa84000 0x0 0x1000
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0x0 0xffa88000 0x0 0x0800
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0x0 0xffa88800 0x0 0x1800
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0x0 0xffa8a000 0x0 0x2000
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0x0 0xffa8c000 0x0 0x1000>;
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bootph-all;
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status = "okay";
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};
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&emmc_phy {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&grf {
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bootph-all;
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};
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&pcfg_pull_none {
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bootph-all;
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};
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&pcfg_pull_up {
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bootph-all;
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};
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&pinctrl {
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bootph-all;
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};
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&pmu {
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bootph-all;
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};
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&pmucru {
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bootph-all;
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};
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&pmugrf {
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bootph-all;
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};
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&sdhci {
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bootph-pre-ram;
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bootph-some-ram;
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max-frequency = <200000000>;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&sdmmc {
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bootph-pre-ram;
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bootph-some-ram;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&sdmmc_bus4 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_cd {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_clk {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_cmd {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&spi1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&spi1_clk {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&spi1_cs0 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&spi1_rx {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&spi1_tx {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&uart2 {
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bootph-all;
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clock-frequency = <24000000>;
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};
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&uart2c_xfer {
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bootph-pre-sram;
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bootph-pre-ram;
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};
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&vopb {
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bootph-some-ram;
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};
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&vopl {
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bootph-some-ram;
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};
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&xin24m {
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bootph-all;
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};
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