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2f3b679298
Add the necessary DSDT files copied from tianocore to boot the RPi4. In addition generate a board specific SSDT to dynamically enable/disable ACPI devices based on FDT. This is required to support the various variants and boot options. It also allows to test the code on QEMU 9.0 without modifications, since it doesn't emulate PCIe yet. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Matthias Brugger <mbrugger@suse.com> Cc: Peter Robinson <pbrobinson@gmail.com>
90 lines
4 KiB
C
90 lines
4 KiB
C
/** @file
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*
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* RPi defines for constructing ACPI tables
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*
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* Copyright (c) 2020, Pete Batard <pete@akeo.ie>
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* Copyright (c) 2019, ARM Ltd. All rights reserved.
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* Copyright (c) 2018, Andrei Warkentin <andrey.warkentin@gmail.com>
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* Copyright (c) Microsoft Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#ifndef __RPI_ACPITABLES_H__
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#define __RPI_ACPITABLES_H__
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#include <acpi/acpi_table.h>
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// The ASL compiler can't perform arithmetic on MEMORY32FIXED ()
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// parameters so you can't pass a constant like BASE + OFFSET.
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// We therefore define a macro that can perform arithmetic base
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// address update with an offset.
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#define MEMORY32SETBASE(BufName, MemName, VarName, Offset) \
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CreateDwordField (^BufName, ^MemName._BAS, VarName) \
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Add (BCM2836_SOC_REGISTERS, Offset, VarName)
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//------------------------------------------------------------------------
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// Interrupts. These are specific to each platform
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//------------------------------------------------------------------------
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#if defined(CONFIG_TARGET_RPI_3)
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#define BCM2836_V3D_BUS_INTERRUPT 0x2A
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#define BCM2836_DMA_INTERRUPT 0x3B
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#define BCM2836_SPI1_INTERRUPT 0x3D
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#define BCM2836_SPI2_INTERRUPT 0x3D
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#define BCM2836_HVS_INTERRUPT 0x41
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#define BCM2836_HDMI0_INTERRUPT 0x48
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#define BCM2836_HDMI1_INTERRUPT 0x49
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#define BCM2836_PV2_INTERRUPT 0x4A
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#define BCM2836_PV0_INTERRUPT 0x4D
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#define BCM2836_PV1_INTERRUPT 0x4E
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#define BCM2836_MBOX_INTERRUPT 0x61
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#define BCM2836_VCHIQ_INTERRUPT 0x62
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#define BCM2386_GPIO_INTERRUPT0 0x51
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#define BCM2386_GPIO_INTERRUPT1 0x52
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#define BCM2386_GPIO_INTERRUPT2 0x53
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#define BCM2386_GPIO_INTERRUPT3 0x54
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#define BCM2836_I2C1_INTERRUPT 0x55
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#define BCM2836_I2C2_INTERRUPT 0x55
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#define BCM2836_SPI0_INTERRUPT 0x56
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#define BCM2836_USB_INTERRUPT 0x29
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#define BCM2836_SDHOST_INTERRUPT 0x58
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#define BCM2836_MMCHS1_INTERRUPT 0x5E
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#define BCM2836_MINI_UART_INTERRUPT 0x3D
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#define BCM2836_PL011_UART_INTERRUPT 0x59
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#elif defined(CONFIG_TARGET_RPI_4)
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#define BCM2836_V3D_BUS_INTERRUPT 0x2A
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#define BCM2836_DMA_INTERRUPT 0x3B
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#define BCM2836_SPI1_INTERRUPT 0x7D
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#define BCM2836_SPI2_INTERRUPT 0x7D
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#define BCM2836_HVS_INTERRUPT 0x41
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#define BCM2836_HDMI0_INTERRUPT 0x48
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#define BCM2836_HDMI1_INTERRUPT 0x49
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#define BCM2836_PV2_INTERRUPT 0x4A
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#define BCM2836_PV0_INTERRUPT 0x4D
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#define BCM2836_PV1_INTERRUPT 0x4E
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#define BCM2836_MBOX_INTERRUPT 0x41
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#define BCM2836_VCHIQ_INTERRUPT 0x42
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#define BCM2386_GPIO_INTERRUPT0 0x91
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#define BCM2386_GPIO_INTERRUPT1 0x92
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#define BCM2386_GPIO_INTERRUPT2 0x93
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#define BCM2386_GPIO_INTERRUPT3 0x94
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#define BCM2836_I2C1_INTERRUPT 0x95
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#define BCM2836_I2C2_INTERRUPT 0x95
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#define BCM2836_SPI0_INTERRUPT 0x96
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#define BCM2836_USB_INTERRUPT 0x69
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#define BCM2836_SDHOST_INTERRUPT 0x98
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#define BCM2836_MMCHS1_INTERRUPT 0x9E
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#define BCM2836_MINI_UART_INTERRUPT 0x7D
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#define BCM2836_PL011_UART_INTERRUPT 0x99
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#define GENET_INTERRUPT0 0xBD
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#define GENET_INTERRUPT1 0xBE
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#define GENET_BASE_ADDRESS 0xFD580000
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#define GENET_LENGTH 0x10000
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#define THERM_SENSOR_BASE_ADDRESS 0xFD5d2200
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#define THERM_SENSOR_LENGTH 0x8
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#else
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#error "Unsupported rpi module for ACPI tables"
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#endif
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#endif // __ACPITABLES_H__
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