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When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
86 lines
1.6 KiB
C
86 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2008
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* Graeme Russ, graeme.russ@gmail.com.
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <asm/io.h>
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#include <asm/msr.h>
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#include <asm/mtrr.h>
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#include <asm/arch/sysinfo.h>
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#include <asm/arch/timestamp.h>
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DECLARE_GLOBAL_DATA_PTR;
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int arch_cpu_init(void)
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{
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int ret = get_coreboot_info(&lib_sysinfo);
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if (ret != 0) {
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printf("Failed to parse coreboot tables.\n");
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return ret;
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}
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timestamp_init();
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return x86_cpu_init_f();
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}
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int checkcpu(void)
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{
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return 0;
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}
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int print_cpuinfo(void)
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{
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return default_print_cpuinfo();
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}
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static void board_final_cleanup(void)
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{
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/*
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* Un-cache the ROM so the kernel has one
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* more MTRR available.
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*
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* Coreboot should have assigned this to the
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* top available variable MTRR.
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*/
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u8 top_mtrr = (native_read_msr(MTRR_CAP_MSR) & 0xff) - 1;
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u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff;
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/* Make sure this MTRR is the correct Write-Protected type */
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if (top_type == MTRR_TYPE_WRPROT) {
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struct mtrr_state state;
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mtrr_open(&state);
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wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0);
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wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0);
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mtrr_close(&state);
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}
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if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
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/*
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* Issue SMI to coreboot to lock down ME and registers
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* when allowed via device tree
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*/
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printf("Finalizing coreboot\n");
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outb(0xcb, 0xb2);
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}
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}
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int last_stage_init(void)
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{
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if (gd->flags & GD_FLG_COLD_BOOT)
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timestamp_add_to_bootstage();
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board_final_cleanup();
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return 0;
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}
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int misc_init_r(void)
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{
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return 0;
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}
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