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Aspeed AST27xx SoCs integrate the CPTRA 1.0 secure IP, which export an ECDSA384_SIGNATURE_VERIFY mailbox command service for SoC to use. This patch is verified by the FIT signature verification using the "sha384,ecdsa384" algorithm. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
40 lines
1.5 KiB
Text
40 lines
1.5 KiB
Text
config ASPEED_HACE
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bool "ASPEED Hash and Crypto Engine"
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depends on DM_HASH
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help
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Select this option to enable a driver for using the SHA engine in
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the ASPEED BMC SoCs.
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Enabling this allows the use of SHA operations in hardware without
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requiring the SHA software implementations. It also improves performance
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and saves code size.
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config ASPEED_ACRY
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bool "ASPEED RSA and ECC Engine"
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depends on ASPEED_AST2600
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help
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Select this option to enable a driver for using the RSA/ECC engine in
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the ASPEED BMC SoCs.
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Enabling this allows the use of RSA/ECC operations in hardware without requiring the
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software implementations. It also improves performance and saves code size.
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config ASPEED_CPTRA_SHA
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bool "Caliptra SHA ACC for Aspeed AST27xx SoCs"
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depends on DM_HASH
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help
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Select this option to enable a driver for using the SHA accelerator provided
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by Caliptra 1.0, which is integrated in AST27xx BMC SoCs.
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Enabling this allows the use of SHA operations in hardware. Note that only
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SHA384 and SHA512 are supported by Caliptra 1.0.
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config ASPEED_CPTRA_ECDSA
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bool "Caliptra ECDSA384 signature verifier for Aspeed SoCs"
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depends on ECDSA_VERIFY || SPL_ECDSA_VERIFY
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help
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Select this option to enable a driver for using the ECDSA384_SIGNATURE_VERIFY
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feature of Caliptra, which is integrated in AST27xx BMC SoCs.
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Enabling this allows the use of ECDSA384 signature verification in hardware.
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Note that only ECDSA384 is supported by Caliptra.
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