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Return the ACPI table revision in acpi_get_table_revision() for PPTT and GTDT. Match both to ACPI 6.2. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org>
522 lines
14 KiB
C
522 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Generic code used to generate ACPI tables
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*
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* Copyright 2019 Google LLC
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*/
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#include <dm.h>
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#include <cpu.h>
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#include <log.h>
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#include <mapmem.h>
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#include <tables_csum.h>
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#include <serial.h>
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#include <version_string.h>
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#include <acpi/acpi_table.h>
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#include <acpi/acpi_device.h>
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#include <asm/global_data.h>
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#include <dm/acpi.h>
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/*
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* OEM_REVISION is 32-bit unsigned number. It should be increased only when
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* changing software version. Therefore it should not depend on build time.
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* U-Boot calculates it from U-Boot version and represent it in hexadecimal
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* notation. As U-Boot version is in form year.month set low 8 bits to 0x01
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* to have valid date. So for U-Boot version 2021.04 OEM_REVISION is set to
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* value 0x20210401.
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*/
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#define OEM_REVISION ((((version_num / 1000) % 10) << 28) | \
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(((version_num / 100) % 10) << 24) | \
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(((version_num / 10) % 10) << 20) | \
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((version_num % 10) << 16) | \
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(((version_num_patch / 10) % 10) << 12) | \
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((version_num_patch % 10) << 8) | \
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0x01)
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int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags)
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{
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struct acpi_table_header *header = &dmar->header;
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struct cpu_info info;
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struct udevice *cpu;
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int ret;
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ret = uclass_first_device_err(UCLASS_CPU, &cpu);
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if (ret)
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return log_msg_ret("cpu", ret);
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ret = cpu_get_info(cpu, &info);
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if (ret)
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return log_msg_ret("info", ret);
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memset((void *)dmar, 0, sizeof(struct acpi_dmar));
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/* Fill out header fields. */
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acpi_fill_header(&dmar->header, "DMAR");
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header->length = sizeof(struct acpi_dmar);
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header->revision = acpi_get_table_revision(ACPITAB_DMAR);
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dmar->host_address_width = info.address_width - 1;
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dmar->flags = flags;
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return 0;
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}
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int acpi_get_table_revision(enum acpi_tables table)
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{
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switch (table) {
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case ACPITAB_FADT:
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return ACPI_FADT_REV_ACPI_6_0;
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case ACPITAB_MADT:
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return ACPI_MADT_REV_ACPI_6_2;
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case ACPITAB_MCFG:
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return ACPI_MCFG_REV_ACPI_3_0;
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case ACPITAB_TCPA:
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/* This version and the rest are open-coded */
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return 2;
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case ACPITAB_TPM2:
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return 4;
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case ACPITAB_SSDT: /* ACPI 3.0 upto 6.3: 2 */
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return 2;
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case ACPITAB_SRAT: /* ACPI 2.0: 1, ACPI 3.0: 2, ACPI 4.0 to 6.3: 3 */
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return 1; /* TODO Should probably be upgraded to 2 */
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case ACPITAB_DMAR:
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return 1;
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case ACPITAB_SLIT: /* ACPI 2.0 upto 6.3: 1 */
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return 1;
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case ACPITAB_SPMI: /* IMPI 2.0 */
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return 5;
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case ACPITAB_HPET: /* Currently 1. Table added in ACPI 2.0 */
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return 1;
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case ACPITAB_VFCT: /* ACPI 2.0/3.0/4.0: 1 */
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return 1;
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case ACPITAB_IVRS:
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return IVRS_FORMAT_FIXED;
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case ACPITAB_DBG2:
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return 0;
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case ACPITAB_FACS: /* ACPI 2.0/3.0: 1, ACPI 4.0 to 6.3: 2 */
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return 1;
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case ACPITAB_RSDT: /* ACPI 1.0 upto 6.3: 1 */
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return 1;
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case ACPITAB_XSDT: /* ACPI 2.0 upto 6.3: 1 */
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return 1;
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case ACPITAB_RSDP: /* ACPI 2.0 upto 6.3: 2 */
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return 2;
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case ACPITAB_HEST:
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return 1;
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case ACPITAB_NHLT:
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return 5;
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case ACPITAB_BERT:
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return 1;
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case ACPITAB_SPCR:
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return 2;
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case ACPITAB_PPTT: /* ACPI 6.2: 1 */
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return 1;
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case ACPITAB_GTDT: /* ACPI 6.2: 2, ACPI 6.3: 3 */
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return 2;
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default:
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return -EINVAL;
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}
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}
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void acpi_fill_header(struct acpi_table_header *header, char *signature)
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{
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memcpy(header->signature, signature, 4);
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
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header->oem_revision = OEM_REVISION;
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memcpy(header->creator_id, ASLC_ID, 4);
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header->creator_revision = ASL_REVISION;
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}
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void acpi_align(struct acpi_ctx *ctx)
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{
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ctx->current = (void *)ALIGN((ulong)ctx->current, 16);
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}
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void acpi_align64(struct acpi_ctx *ctx)
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{
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ctx->current = (void *)ALIGN((ulong)ctx->current, 64);
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}
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void acpi_inc(struct acpi_ctx *ctx, uint amount)
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{
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ctx->current += amount;
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}
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void acpi_inc_align(struct acpi_ctx *ctx, uint amount)
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{
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ctx->current += amount;
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acpi_align(ctx);
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}
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/**
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* Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
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* and checksum.
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*/
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int acpi_add_table(struct acpi_ctx *ctx, void *table)
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{
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int i, entries_num;
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struct acpi_rsdt *rsdt;
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struct acpi_xsdt *xsdt;
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/* The RSDT is mandatory while the XSDT is not */
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rsdt = ctx->rsdt;
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/* This should always be MAX_ACPI_TABLES */
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entries_num = ARRAY_SIZE(rsdt->entry);
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for (i = 0; i < entries_num; i++) {
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if (rsdt->entry[i] == 0)
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break;
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}
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if (i >= entries_num) {
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log_err("ACPI: Error: too many tables\n");
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return -E2BIG;
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}
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/* Add table to the RSDT */
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rsdt->entry[i] = nomap_to_sysmem(table);
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/* Fix RSDT length or the kernel will assume invalid entries */
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rsdt->header.length = sizeof(struct acpi_table_header) +
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(sizeof(u32) * (i + 1));
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/* Re-calculate checksum */
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rsdt->header.checksum = 0;
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rsdt->header.checksum = table_compute_checksum((u8 *)rsdt,
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rsdt->header.length);
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/*
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* And now the same thing for the XSDT. We use the same index as for
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* now we want the XSDT and RSDT to always be in sync in U-Boot
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*/
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xsdt = ctx->xsdt;
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/* Add table to the XSDT */
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xsdt->entry[i] = nomap_to_sysmem(table);
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/* Fix XSDT length */
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xsdt->header.length = sizeof(struct acpi_table_header) +
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(sizeof(u64) * (i + 1));
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/* Re-calculate checksum */
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xsdt->header.checksum = 0;
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xsdt->header.checksum = table_compute_checksum((u8 *)xsdt,
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xsdt->header.length);
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return 0;
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}
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int acpi_write_fadt(struct acpi_ctx *ctx, const struct acpi_writer *entry)
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{
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struct acpi_table_header *header;
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struct acpi_fadt *fadt;
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fadt = ctx->current;
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header = &fadt->header;
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memset((void *)fadt, '\0', sizeof(struct acpi_fadt));
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acpi_fill_header(header, "FACP");
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header->length = sizeof(struct acpi_fadt);
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header->revision = acpi_get_table_revision(ACPITAB_FADT);
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
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memcpy(header->creator_id, ASLC_ID, 4);
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header->creator_revision = 1;
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fadt->minor_revision = 2;
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fadt->x_firmware_ctrl = map_to_sysmem(ctx->facs);
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fadt->x_dsdt = map_to_sysmem(ctx->dsdt);
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if (fadt->x_firmware_ctrl < 0x100000000ULL)
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fadt->firmware_ctrl = fadt->x_firmware_ctrl;
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if (fadt->x_dsdt < 0x100000000ULL)
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fadt->dsdt = fadt->x_dsdt;
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fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED;
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acpi_fill_fadt(fadt);
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header->checksum = table_compute_checksum(fadt, header->length);
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return acpi_add_fadt(ctx, fadt);
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}
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ACPI_WRITER(5fadt, "FADT", acpi_write_fadt, 0);
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int acpi_write_madt(struct acpi_ctx *ctx, const struct acpi_writer *entry)
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{
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struct acpi_table_header *header;
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struct acpi_madt *madt;
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void *current;
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madt = ctx->current;
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memset(madt, '\0', sizeof(struct acpi_madt));
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header = &madt->header;
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/* Fill out header fields */
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acpi_fill_header(header, "APIC");
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header->length = sizeof(struct acpi_madt);
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header->revision = acpi_get_table_revision(ACPITAB_MADT);
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acpi_inc(ctx, sizeof(struct acpi_madt));
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/* TODO: Get rid of acpi_fill_madt and use driver model */
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current = acpi_fill_madt(madt, ctx);
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/* (Re)calculate length and checksum */
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header->length = (uintptr_t)current - (uintptr_t)madt;
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header->checksum = table_compute_checksum((void *)madt, header->length);
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acpi_add_table(ctx, madt);
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ctx->current = (void *)madt + madt->header.length;
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return 0;
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}
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ACPI_WRITER(5madt, "MADT", acpi_write_madt, 0);
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void acpi_create_dbg2(struct acpi_dbg2_header *dbg2,
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int port_type, int port_subtype,
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struct acpi_gen_regaddr *address, u32 address_size,
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const char *device_path)
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{
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uintptr_t current;
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struct acpi_dbg2_device *device;
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u32 *dbg2_addr_size;
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struct acpi_table_header *header;
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size_t path_len;
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const char *path;
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char *namespace;
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/* Fill out header fields. */
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current = (uintptr_t)dbg2;
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memset(dbg2, '\0', sizeof(struct acpi_dbg2_header));
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header = &dbg2->header;
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header->revision = acpi_get_table_revision(ACPITAB_DBG2);
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acpi_fill_header(header, "DBG2");
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/* One debug device defined */
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dbg2->devices_offset = sizeof(struct acpi_dbg2_header);
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dbg2->devices_count = 1;
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current += sizeof(struct acpi_dbg2_header);
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/* Device comes after the header */
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device = (struct acpi_dbg2_device *)current;
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memset(device, 0, sizeof(struct acpi_dbg2_device));
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current += sizeof(struct acpi_dbg2_device);
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device->revision = 0;
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device->address_count = 1;
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device->port_type = port_type;
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device->port_subtype = port_subtype;
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/* Base Address comes after device structure */
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memcpy((void *)current, address, sizeof(struct acpi_gen_regaddr));
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device->base_address_offset = current - (uintptr_t)device;
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current += sizeof(struct acpi_gen_regaddr);
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/* Address Size comes after address structure */
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dbg2_addr_size = (uint32_t *)current;
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device->address_size_offset = current - (uintptr_t)device;
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*dbg2_addr_size = address_size;
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current += sizeof(uint32_t);
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/* Namespace string comes last, use '.' if not provided */
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path = device_path ? : ".";
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/* Namespace string length includes NULL terminator */
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path_len = strlen(path) + 1;
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namespace = (char *)current;
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device->namespace_string_length = path_len;
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device->namespace_string_offset = current - (uintptr_t)device;
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strncpy(namespace, path, path_len);
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current += path_len;
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/* Update structure lengths and checksum */
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device->length = current - (uintptr_t)device;
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header->length = current - (uintptr_t)dbg2;
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header->checksum = table_compute_checksum(dbg2, header->length);
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}
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int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev,
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uint access_size)
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{
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struct acpi_dbg2_header *dbg2 = ctx->current;
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char path[ACPI_PATH_MAX];
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struct acpi_gen_regaddr address;
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u64 addr;
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int ret;
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if (!device_active(dev)) {
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log_info("Device not enabled\n");
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return -EACCES;
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}
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/*
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* PCI devices don't remember their resource allocation information in
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* U-Boot at present. We assume that MMIO is used for the UART and that
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* the address space is 32 bytes: ns16550 uses 8 registers of up to
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* 32-bits each. This is only for debugging so it is not a big deal.
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*/
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addr = dm_pci_read_bar32(dev, 0);
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log_debug("UART addr %lx\n", (ulong)addr);
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ret = acpi_device_path(dev, path, sizeof(path));
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if (ret)
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return log_msg_ret("path", ret);
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memset(&address, '\0', sizeof(address));
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address.space_id = ACPI_ADDRESS_SPACE_MEMORY;
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address.addrl = (uint32_t)addr;
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address.addrh = (uint32_t)((addr >> 32) & 0xffffffff);
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address.access_size = access_size;
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ret = acpi_device_path(dev, path, sizeof(path));
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if (ret)
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return log_msg_ret("path", ret);
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acpi_create_dbg2(dbg2, ACPI_DBG2_SERIAL_PORT,
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ACPI_DBG2_16550_COMPATIBLE, &address, 0x1000, path);
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acpi_inc_align(ctx, dbg2->header.length);
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acpi_add_table(ctx, dbg2);
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return 0;
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}
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static int acpi_write_spcr(struct acpi_ctx *ctx, const struct acpi_writer *entry)
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{
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struct serial_device_info serial_info = {0};
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ulong serial_address, serial_offset;
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struct acpi_table_header *header;
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struct acpi_spcr *spcr;
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struct udevice *dev;
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uint serial_config;
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uint serial_width;
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int access_size;
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int space_id;
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int ret = -ENODEV;
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spcr = ctx->current;
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header = &spcr->header;
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memset(spcr, '\0', sizeof(struct acpi_spcr));
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/* Fill out header fields */
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acpi_fill_header(header, "SPCR");
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header->length = sizeof(struct acpi_spcr);
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header->revision = 2;
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/* Read the device once, here. It is reused below */
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dev = gd->cur_serial_dev;
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if (dev)
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ret = serial_getinfo(dev, &serial_info);
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if (ret)
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serial_info.type = SERIAL_CHIP_UNKNOWN;
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/* Encode chip type */
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switch (serial_info.type) {
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case SERIAL_CHIP_16550_COMPATIBLE:
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spcr->interface_type = ACPI_DBG2_16550_COMPATIBLE;
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break;
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case SERIAL_CHIP_PL01X:
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spcr->interface_type = ACPI_DBG2_ARM_PL011;
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break;
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case SERIAL_CHIP_UNKNOWN:
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default:
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spcr->interface_type = ACPI_DBG2_UNKNOWN;
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break;
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}
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/* Encode address space */
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switch (serial_info.addr_space) {
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case SERIAL_ADDRESS_SPACE_MEMORY:
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space_id = ACPI_ADDRESS_SPACE_MEMORY;
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break;
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case SERIAL_ADDRESS_SPACE_IO:
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default:
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space_id = ACPI_ADDRESS_SPACE_IO;
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break;
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}
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serial_width = serial_info.reg_width * 8;
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serial_offset = serial_info.reg_offset << serial_info.reg_shift;
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serial_address = serial_info.addr + serial_offset;
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/* Encode register access size */
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switch (serial_info.reg_shift) {
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case 0:
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access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
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break;
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case 1:
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access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
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break;
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case 2:
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access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
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break;
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case 3:
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access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS;
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break;
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default:
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access_size = ACPI_ACCESS_SIZE_UNDEFINED;
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break;
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}
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debug("UART type %u @ %lx\n", spcr->interface_type, serial_address);
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/* Fill GAS */
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spcr->serial_port.space_id = space_id;
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spcr->serial_port.bit_width = serial_width;
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spcr->serial_port.bit_offset = 0;
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spcr->serial_port.access_size = access_size;
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spcr->serial_port.addrl = lower_32_bits(serial_address);
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spcr->serial_port.addrh = upper_32_bits(serial_address);
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/* Encode baud rate */
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switch (serial_info.baudrate) {
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case 9600:
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spcr->baud_rate = 3;
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break;
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case 19200:
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spcr->baud_rate = 4;
|
|
break;
|
|
case 57600:
|
|
spcr->baud_rate = 6;
|
|
break;
|
|
case 115200:
|
|
spcr->baud_rate = 7;
|
|
break;
|
|
default:
|
|
spcr->baud_rate = 0;
|
|
break;
|
|
}
|
|
|
|
serial_config = SERIAL_DEFAULT_CONFIG;
|
|
if (dev)
|
|
ret = serial_getconfig(dev, &serial_config);
|
|
|
|
spcr->parity = SERIAL_GET_PARITY(serial_config);
|
|
spcr->stop_bits = SERIAL_GET_STOP(serial_config);
|
|
|
|
/* No PCI devices for now */
|
|
spcr->pci_device_id = 0xffff;
|
|
spcr->pci_vendor_id = 0xffff;
|
|
|
|
/*
|
|
* SPCR has no clue if the UART base clock speed is different
|
|
* to the default one. However, the SPCR 1.04 defines baud rate
|
|
* 0 as a preconfigured state of UART and OS is supposed not
|
|
* to touch the configuration of the serial device.
|
|
*/
|
|
if (serial_info.clock != SERIAL_DEFAULT_CLOCK)
|
|
spcr->baud_rate = 0;
|
|
|
|
/* Fix checksum */
|
|
header->checksum = table_compute_checksum((void *)spcr, header->length);
|
|
|
|
acpi_add_table(ctx, spcr);
|
|
acpi_inc(ctx, spcr->header.length);
|
|
|
|
return 0;
|
|
}
|
|
|
|
ACPI_WRITER(5spcr, "SPCR", acpi_write_spcr, 0);
|