u-boot/board/xilinx/mbv/board.c
Michal Simek 451b2ea211 riscv: mbv: Enable SPL and binman
Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb
(supervisor mode). DTB is placed at fixed address to ensure that it is 8
byte aligned which is not ensured when dtb is attached behind SPL binary
that's why SPL and U-Boot are taking DTB from the same address.
Also align addresses for both defconfigs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com
2024-03-01 08:41:39 +01:00

21 lines
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C

// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2023, Advanced Micro Devices, Inc.
*
* Michal Simek <michal.simek@amd.com>
*/
#include <spl.h>
int board_init(void)
{
return 0;
}
#ifdef CONFIG_SPL
u32 spl_boot_device(void)
{
/* RISC-V QEMU only supports RAM as SPL boot device */
return BOOT_DEVICE_RAM;
}
#endif