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54e1aa236f
Add support for the Variscite VAR-SOM-IMX93 evaluation kit. The SoM consists of an NXP iMX93 dual A55 CPU. The SoM is mounted on a Variscite Symphony SBC. Signed-off-by: Mathieu Othacehe <m.othacehe@gmail.com>
58 lines
983 B
C
58 lines
983 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2023 Variscite Ltd.
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*/
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#include <net.h>
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#include <miiphy.h>
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#include <env.h>
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#include "../common/imx9_eeprom.h"
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#define CHAR_BIT 8
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static u64 mac2int(const u8 hwaddr[])
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{
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u8 i;
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u64 ret = 0;
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const u8 *p = hwaddr;
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for (i = 6; i > 0; i--)
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ret |= (u64)*p++ << (CHAR_BIT * (i - 1));
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return ret;
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}
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static void int2mac(const u64 mac, u8 *hwaddr)
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{
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u8 i;
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u8 *p = hwaddr;
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for (i = 6; i > 0; i--)
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*p++ = mac >> (CHAR_BIT * (i - 1));
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}
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int var_setup_mac(struct var_eeprom *eeprom)
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{
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int ret;
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unsigned char enetaddr[6];
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u64 addr;
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unsigned char enet1addr[6];
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ret = eth_env_get_enetaddr("ethaddr", enetaddr);
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if (ret)
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return 0;
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ret = var_eeprom_get_mac(eeprom, enetaddr);
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if (ret)
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return ret;
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if (!is_valid_ethaddr(enetaddr))
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return -EINVAL;
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eth_env_set_enetaddr("ethaddr", enetaddr);
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addr = mac2int(enetaddr);
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int2mac(addr + 1, enet1addr);
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eth_env_set_enetaddr("eth1addr", enet1addr);
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return 0;
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}
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