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5a2070783d
If CONFIG_SYS_SKIP_UART_INIT is enabled, calculate the current baud rate and update the "console" environment variable. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
99 lines
2.1 KiB
C
99 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2022 Nuvoton Technology Corp.
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <asm/arch/gcr.h>
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#include "../common/uart.h"
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#define SR_MII_CTRL_SWR_BIT15 15
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#define DRAM_512MB_ECC_SIZE 0x1C000000ULL
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#define DRAM_512MB_SIZE 0x20000000ULL
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#define DRAM_1GB_ECC_SIZE 0x38000000ULL
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#define DRAM_1GB_SIZE 0x40000000ULL
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#define DRAM_2GB_ECC_SIZE 0x70000000ULL
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#define DRAM_2GB_SIZE 0x80000000ULL
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#define DRAM_4GB_ECC_SIZE 0xE0000000ULL
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#define DRAM_4GB_SIZE 0x100000000ULL
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA;
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/*
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* get dram active size value from bootblock.
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* Value sent using scrpad_03 register.
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* feature available in bootblock 0.0.6 and above.
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*/
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gd->ram_size = readl(&gcr->scrpad_c);
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if (gd->ram_size == 0)
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gd->ram_size = readl(&gcr->scrpad_b);
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else
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gd->ram_size *= 0x100000ULL;
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debug("ram_size: %llx ", gd->ram_size);
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = 0;
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switch (gd->ram_size) {
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case DRAM_512MB_ECC_SIZE:
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case DRAM_512MB_SIZE:
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case DRAM_1GB_ECC_SIZE:
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case DRAM_1GB_SIZE:
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case DRAM_2GB_ECC_SIZE:
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case DRAM_2GB_SIZE:
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gd->bd->bi_dram[0].size = gd->ram_size;
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gd->bd->bi_dram[1].start = 0;
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gd->bd->bi_dram[1].size = 0;
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break;
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case DRAM_4GB_ECC_SIZE:
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gd->bd->bi_dram[0].size = DRAM_2GB_SIZE;
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gd->bd->bi_dram[1].start = DRAM_4GB_SIZE;
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gd->bd->bi_dram[1].size = DRAM_2GB_SIZE -
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(DRAM_4GB_SIZE - DRAM_4GB_ECC_SIZE);
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/* use bank0 only */
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gd->ram_size = DRAM_2GB_SIZE;
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break;
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case DRAM_4GB_SIZE:
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gd->bd->bi_dram[0].size = DRAM_2GB_SIZE;
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gd->bd->bi_dram[1].start = DRAM_4GB_SIZE;
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gd->bd->bi_dram[1].size = DRAM_2GB_SIZE;
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/* use bank0 only */
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gd->ram_size = DRAM_2GB_SIZE;
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break;
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default:
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gd->bd->bi_dram[0].size = DRAM_1GB_SIZE;
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gd->bd->bi_dram[1].start = 0;
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gd->bd->bi_dram[1].size = 0;
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gd->ram_size = DRAM_1GB_SIZE;
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break;
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}
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return 0;
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}
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int last_stage_init(void)
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{
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board_set_console();
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return 0;
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}
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