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As cache is enabled in U-Boot and disabled in ATF(BL31). We need to perform cache flush of buffers that are shared between U-Boot and ATF using secure monitor calls. Signed-off-by: Mahesh Rao <mahesh.rao@altera.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
82 lines
1.6 KiB
C
82 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Intel Corporation <www.intel.com>
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* Copyright (C) 2025 Altera Corporation <www.altera.com>
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*
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*/
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#include <cpu_func.h>
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#include <asm/ptrace.h>
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#include <asm/system.h>
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#include <linux/errno.h>
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#include <linux/intel-smc.h>
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#include <linux/string.h>
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int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int ret_len)
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{
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struct pt_regs regs;
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memset(®s, 0, sizeof(regs));
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regs.regs[0] = func_id;
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if (args)
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memcpy(®s.regs[1], args, arg_len * sizeof(*args));
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smc_call(®s);
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if (ret_arg)
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memcpy(ret_arg, ®s.regs[1], ret_len * sizeof(*ret_arg));
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return regs.regs[0];
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}
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int smc_send_mailbox(u32 cmd, u32 len, u32 *arg, u8 urgent, u32 *resp_buf_len,
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u32 *resp_buf)
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{
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int ret;
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u64 args[6];
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u64 resp[3];
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args[0] = cmd;
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args[1] = (u64)arg;
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args[2] = len;
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args[3] = urgent;
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args[4] = (u64)resp_buf;
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if (arg && len > 0)
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flush_dcache_range((uintptr_t)arg, (uintptr_t)arg + len);
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if (resp_buf && resp_buf_len && *resp_buf_len > 0) {
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args[5] = *resp_buf_len;
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flush_dcache_range((uintptr_t)resp_buf, (uintptr_t)resp_buf + *resp_buf_len);
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} else {
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args[5] = 0;
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}
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ret = invoke_smc(INTEL_SIP_SMC_MBOX_SEND_CMD, args, ARRAY_SIZE(args),
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resp, ARRAY_SIZE(resp));
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if (ret == INTEL_SIP_SMC_STATUS_OK && resp_buf && resp_buf_len) {
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if (!resp[0])
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*resp_buf_len = resp[1];
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}
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return (int)resp[0];
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}
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int smc_get_usercode(u32 *usercode)
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{
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int ret;
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u64 resp;
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if (!usercode)
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return -EINVAL;
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ret = invoke_smc(INTEL_SIP_SMC_GET_USERCODE, NULL, 0,
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&resp, 1);
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if (ret == INTEL_SIP_SMC_STATUS_OK)
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*usercode = (u32)resp;
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return ret;
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}
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