mirror of
https://github.com/u-boot/u-boot.git
synced 2025-04-17 02:15:02 +00:00
99d240e8fb
amba is not approved node name for simple-bus that's why use axi instead to be aligned with other xilinx boards. Node reference is not changed that's why there is no impact but also mini configuration will never gets to OS that's why nothing should be affected from OS perspective (paths in /proc/ for example). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1b18a69ae47bdcb1a0795af7621d13bfecfc9861.1726219714.git.michal.simek@amd.com
72 lines
1.3 KiB
Text
72 lines
1.3 KiB
Text
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* dts file for Xilinx Versal Mini QSPI Configuration
|
|
*
|
|
* (C) Copyright 2018-2019, Xilinx, Inc.
|
|
*
|
|
* Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>
|
|
* Michal Simek <michal.simek@amd.com>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
/ {
|
|
compatible = "xlnx,versal";
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
model = "Xilinx Versal MINI QSPI";
|
|
|
|
clk150: clk150 {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0x0>;
|
|
clock-frequency = <150000000>;
|
|
};
|
|
|
|
dcc: dcc {
|
|
compatible = "arm,dcc";
|
|
status = "okay";
|
|
bootph-all;
|
|
};
|
|
|
|
amba: axi {
|
|
bootph-all;
|
|
compatible = "simple-bus";
|
|
#address-cells = <0x2>;
|
|
#size-cells = <0x2>;
|
|
ranges;
|
|
|
|
qspi: spi@f1030000 {
|
|
compatible = "xlnx,versal-qspi-1.0";
|
|
status = "okay";
|
|
clock-names = "ref_clk", "pclk";
|
|
num-cs = <0x1>;
|
|
reg = <0x0 0xf1030000 0x0 0x1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clk150 &clk150>;
|
|
|
|
flash0: flash@0 {
|
|
compatible = "n25q512a", "micron,m25p80",
|
|
"jedec,spi-nor";
|
|
reg = <0x0>;
|
|
spi-tx-bus-width = <4>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-max-frequency = <20000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
serial0 = &dcc;
|
|
spi0 = &qspi;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200";
|
|
};
|
|
|
|
memory@fffc0000 {
|
|
device_type = "memory";
|
|
reg = <0x0 0xfffc0000 0x0 0x40000>;
|
|
};
|
|
};
|