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d1db2733a5
Of all T30 transformers, only the TF700T has a FullHD DSI panel, which is connected via tc358768 RGB to DSI bridge. Since the bridge driver is available now, TF700T can have video support. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
164 lines
3.5 KiB
Text
164 lines
3.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include "tegra30-asus-transformer.dtsi"
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/ {
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model = "ASUS Transformer Infinity TF700T";
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compatible = "asus,tf700t", "nvidia,tegra30";
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host1x@50000000 {
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dc@54200000 {
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clocks = <&tegra_car TEGRA30_CLK_DISP1>,
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<&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
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rgb {
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status = "okay";
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nvidia,panel = <&tc358768>;
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};
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};
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};
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pinmux@70000868 {
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state_default: pinmux {
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lcd_pwr2_pc6 {
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nvidia,pins = "lcd_pwr2_pc6",
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"lcd_dc1_pd2";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pbb3 {
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nvidia,pins = "pbb3";
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nvidia,function = "vgp3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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spi2_mosi_px0 {
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nvidia,pins = "spi2_mosi_px0";
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nvidia,function = "spi2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pbb7 {
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nvidia,pins = "pbb7";
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nvidia,function = "i2s4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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kb_row7_pr7 {
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nvidia,pins = "kb_row7_pr7";
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nvidia,function = "kbc";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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gmi_cs4_n_pk2 {
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nvidia,pins = "gmi_cs4_n_pk2";
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nvidia,function = "gmi";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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};
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};
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tc358768_refclk: clock-tc358768 {
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compatible = "fixed-clock";
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clock-frequency = <23100000>;
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clock-accuracy = <100>;
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#clock-cells = <0>;
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};
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tc358768_osc: clock-tc358768-osc-gate {
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compatible = "gpio-gate-clock";
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enable-gpios = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>;
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clocks = <&tc358768_refclk>;
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#clock-cells = <0>;
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};
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i2c-mux {
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compatible = "i2c-mux-gpio";
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mux-gpios = <&gpio TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>;
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i2c-parent = <&gen1_i2c>;
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idle-state = <0x0>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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tc358768: dsi@7 {
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compatible = "toshiba,tc358768";
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reg = <0x7>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tc358768_osc>;
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clock-names = "refclk";
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reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
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vddc-supply = <&vdd_1v2_mipi>;
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vddio-supply = <&vdd_1v8_vio>;
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vddmipi-supply = <&vdd_1v2_mipi>;
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panel = <&panel>;
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};
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};
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};
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panel: panel {
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compatible = "panasonic,vvx10f004b00";
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power-supply = <&vdd_pnl_reg>;
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backlight = <&backlight>;
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/delete-property/ enable-gpios;
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display-timings {
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timing@0 {
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/* 1920x1200@60Hz */
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clock-frequency = <154000000>;
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hactive = <1920>;
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hfront-porch = <48>;
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hback-porch = <80>;
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hsync-len = <32>;
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hsync-active = <1>;
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vactive = <1200>;
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vfront-porch = <3>;
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vback-porch = <26>;
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vsync-len = <6>;
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vsync-active = <1>;
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};
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};
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};
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vdd_1v2_mipi: regulator-mipi {
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compatible = "regulator-fixed";
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regulator-name = "tc358768_1v2_vdd";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-enable-ramp-delay = <10000>;
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regulator-boot-on;
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gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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