mirror of
https://github.com/u-boot/u-boot.git
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d53b7074eb
The commit f087f7fd27 ("rockchip: px30/rk3326: migrate to
OF_UPSTREAM") migrated px30/rk3326 boards to use OF_UPSTREAM, however
the soc dtsi and dt-bindings files remained.
Remove the remaining px30/rk3326 soc dtsi and dt-bindings to ensure the
files from dts/upstream is used.
The gpio-ranges props is moved to u-boot.dtsi files and a ethernet0
alias is added to px30-firefly, they are missing in the dts/upstream
files. No changes are expected with this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
128 lines
1.9 KiB
Text
128 lines
1.9 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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chosen {
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u-boot,spl-boot-order = &sdmmc;
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};
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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mmc0 = &sdmmc;
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serial1 = &uart1;
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serial2 = &uart2;
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spi0 = &sfc;
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};
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dmc {
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bootph-all;
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compatible = "rockchip,px30-dmc", "syscon";
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reg = <0x0 0xff2a0000 0x0 0x1000>;
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};
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rng: rng@ff0b0000 {
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compatible = "rockchip,cryptov2-rng";
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reg = <0x0 0xff0b0000 0x0 0x4000>;
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status = "okay";
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};
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};
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/* U-Boot clk driver for px30 cannot set GPU_CLK */
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&cru {
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bootph-all;
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assigned-clocks = <&cru PLL_NPLL>,
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<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
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<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
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<&cru PCLK_BUS_PRE>, <&cru PLL_CPLL>;
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assigned-clock-rates = <1188000000>,
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<200000000>, <200000000>,
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<150000000>, <150000000>,
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<100000000>, <17000000>;
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};
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&gpio0 {
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bootph-all;
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gpio-ranges = <&pinctrl 0 0 32>;
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};
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&gpio1 {
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bootph-all;
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gpio-ranges = <&pinctrl 0 32 32>;
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};
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&gpio2 {
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bootph-all;
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gpio-ranges = <&pinctrl 0 64 32>;
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};
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&gpio3 {
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bootph-all;
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gpio-ranges = <&pinctrl 0 96 32>;
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};
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&grf {
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bootph-all;
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};
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&pmucru {
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bootph-all;
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};
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&pmugrf {
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bootph-all;
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};
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&rk817 {
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regulators {
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vcc_cam: LDO_REG9 {
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regulator-name = "vcc_cam";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <3000000>;
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};
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};
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};
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};
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&saradc {
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bootph-all;
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status = "okay";
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};
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&sdmmc {
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bootph-all;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&sfc {
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bootph-all;
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};
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&{/spi@ff3a0000/flash@0} {
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bootph-all;
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};
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&uart1 {
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clock-frequency = <24000000>;
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bootph-all;
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};
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&uart2 {
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clock-frequency = <24000000>;
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bootph-all;
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};
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&xin24m {
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bootph-all;
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};
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