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Add basic support for PHYTEC phyCORE-AM62x SoM. Supported features: - 2GB DDR4 RAM - eMMC Flash - OSPI NOR Flash - external uSD - Ethernet - debug UART Product page SoM: https://www.phytec.com/product/phycore-am62x Device trees were taken from Linux v6.7-rc3. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Dhruva Gole <d-gole@ti.com>
119 lines
2.7 KiB
Text
119 lines
2.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* phyCORE-AM62x dts file for R5 SPL with 2GB RAM
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* Copyright (C) 2022 - 2023 Phytec Messtechnik GmbH
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* Author: Wadim Egorov <w.egorov@phytec.de>
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*/
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#include "k3-am625-phyboard-lyra-rdk.dts"
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#include "k3-am62-phycore-som-ddr4-2gb.dtsi"
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#include "k3-am62-ddr.dtsi"
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#include "k3-am625-phyboard-lyra-rdk-u-boot.dtsi"
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/ {
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aliases {
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remoteproc0 = &sysctrler;
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remoteproc1 = &a53_0;
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serial0 = &wkup_uart0;
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serial3 = &main_uart1;
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};
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a53_0: a53@0 {
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compatible = "ti,am654-rproc";
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reg = <0x00 0x00a90000 0x00 0x10>;
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power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
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<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
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<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
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resets = <&k3_reset 135 0>;
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clocks = <&k3_clks 61 0>;
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assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
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assigned-clock-parents = <&k3_clks 61 2>;
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assigned-clock-rates = <200000000>, <1200000000>;
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ti,sci = <&dmsc>;
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ti,sci-proc-id = <32>;
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ti,sci-host-id = <10>;
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bootph-pre-ram;
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};
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dm_tifs: dm-tifs {
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compatible = "ti,j721e-dm-sci";
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ti,host-id = <36>;
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ti,secure-host;
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mbox-names = "rx", "tx";
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mboxes= <&secure_proxy_main 22>,
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<&secure_proxy_main 23>;
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bootph-pre-ram;
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};
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memory@80000000 {
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device_type = "memory";
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/* 2G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
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bootph-pre-ram;
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};
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};
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&secure_proxy_sa3 {
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/* We require this for boot handshake */
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status = "okay";
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};
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&cbass_main {
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sysctrler: sysctrler {
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compatible = "ti,am654-system-controller";
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mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
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mbox-names = "tx", "rx", "boot_notify";
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bootph-pre-ram;
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};
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};
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&dmsc {
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mboxes= <&secure_proxy_main 0>,
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<&secure_proxy_main 1>,
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<&secure_proxy_main 0>;
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mbox-names = "rx", "tx", "notify";
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ti,host-id = <35>;
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ti,secure-host;
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};
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&main_bcdma {
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ti,sci = <&dm_tifs>;
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};
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&main_pktdma {
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ti,sci = <&dm_tifs>;
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};
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/* Main UART1 is used for TIFS firmware logs */
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&main_uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart1_pins_default>;
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status = "okay";
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bootph-pre-ram;
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};
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&mcu_pmx0 {
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wkup_uart0_pins_default: wkup-uart0-pins-default {
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pinctrl-single,pins = <
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AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
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AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
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AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
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AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
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>;
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bootph-pre-ram;
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};
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};
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&ospi0 {
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reg = <0x00 0x0fc40000 0x00 0x100>,
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<0x00 0x60000000 0x00 0x08000000>;
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};
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/* WKUP UART0 is used for DM firmware logs */
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&wkup_uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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status = "okay";
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bootph-pre-ram;
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};
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