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5d1aac358f
Updated PLL driver sequencing requires us to use udelay in the PLL driver as there is no poll bit to get the status of operations. tick-timer(mcu_timer0/main_timer0) setting up the clocks for itself is something that won't work as the PLL driver will be using udelay and PLLs are configured during clock probe which would end up in a recursive probe. tick-timer being used by K3 devices are configured by ROM and we really don't need to configure any of the clocks. Remove the clock dependency from R5 stage as we don't need to setup clocks for it. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
7 lines
189 B
Text
7 lines
189 B
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* AM62x LP SK dts file for SPLs
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* Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include "k3-am62-lp-sk-binman.dtsi"
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