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https://github.com/u-boot/u-boot.git
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3724ec4e5c
The initial commit used log_msg_ret() wrongly. Fix that by moving error
report to a separate dev_err() call and shrink the first argument of
log_msg_ret() to no more than 4 chars.
Fixes: 6b5c8d98e2 ("net: add hifemac_mdio MDIO bus driver for HiSilicon platform")
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
121 lines
2.7 KiB
C
121 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Hisilicon Fast Ethernet MDIO Bus Driver
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*
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* Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
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*/
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#include <dm.h>
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#include <clk.h>
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#include <miiphy.h>
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#include <dm/device_compat.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#define MDIO_RWCTRL 0x00
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#define MDIO_RO_DATA 0x04
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#define MDIO_WRITE BIT(13)
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#define MDIO_RW_FINISH BIT(15)
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#define BIT_PHY_ADDR_OFFSET 8
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#define BIT_WR_DATA_OFFSET 16
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struct hisi_femac_mdio_data {
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struct clk *clk;
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void __iomem *membase;
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};
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static int hisi_femac_mdio_wait_ready(struct hisi_femac_mdio_data *data)
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{
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u32 val;
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return readl_poll_timeout(data->membase + MDIO_RWCTRL,
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val, val & MDIO_RW_FINISH, 10000);
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}
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static int hisi_femac_mdio_read(struct udevice *dev, int addr, int devad, int reg)
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{
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struct hisi_femac_mdio_data *data = dev_get_priv(dev);
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int ret;
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ret = hisi_femac_mdio_wait_ready(data);
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if (ret)
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return ret;
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writel((addr << BIT_PHY_ADDR_OFFSET) | reg,
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data->membase + MDIO_RWCTRL);
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ret = hisi_femac_mdio_wait_ready(data);
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if (ret)
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return ret;
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return readl(data->membase + MDIO_RO_DATA) & 0xFFFF;
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}
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static int hisi_femac_mdio_write(struct udevice *dev, int addr, int devad, int reg, u16 val)
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{
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struct hisi_femac_mdio_data *data = dev_get_priv(dev);
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int ret;
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ret = hisi_femac_mdio_wait_ready(data);
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if (ret)
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return ret;
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writel(MDIO_WRITE | (val << BIT_WR_DATA_OFFSET) |
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(addr << BIT_PHY_ADDR_OFFSET) | reg,
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data->membase + MDIO_RWCTRL);
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return hisi_femac_mdio_wait_ready(data);
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}
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static int hisi_femac_mdio_of_to_plat(struct udevice *dev)
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{
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struct hisi_femac_mdio_data *data = dev_get_priv(dev);
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int ret;
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data->membase = dev_remap_addr(dev);
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if (IS_ERR(data->membase)) {
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ret = PTR_ERR(data->membase);
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dev_err(dev, "Failed to remap base addr %d\n", ret);
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return log_msg_ret("mdio", ret);
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}
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// clk is optional
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data->clk = devm_clk_get_optional(dev, NULL);
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return 0;
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}
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static int hisi_femac_mdio_probe(struct udevice *dev)
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{
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struct hisi_femac_mdio_data *data = dev_get_priv(dev);
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int ret;
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ret = clk_prepare_enable(data->clk);
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if (ret) {
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dev_err(dev, "Failed to enable clock: %d\n", ret);
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return log_msg_ret("clk", ret);
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}
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return 0;
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}
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static const struct mdio_ops hisi_femac_mdio_ops = {
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.read = hisi_femac_mdio_read,
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.write = hisi_femac_mdio_write,
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};
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static const struct udevice_id hisi_femac_mdio_dt_ids[] = {
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{ .compatible = "hisilicon,hisi-femac-mdio" },
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{ }
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};
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U_BOOT_DRIVER(hisi_femac_mdio_driver) = {
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.name = "hisi-femac-mdio",
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.id = UCLASS_MDIO,
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.of_match = hisi_femac_mdio_dt_ids,
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.of_to_plat = hisi_femac_mdio_of_to_plat,
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.probe = hisi_femac_mdio_probe,
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.ops = &hisi_femac_mdio_ops,
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.plat_auto = sizeof(struct mdio_perdev_priv),
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.priv_auto = sizeof(struct hisi_femac_mdio_data),
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};
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