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35638172f9
Initial creation of new system manager driver. Add supports for the SOCFPGA System Manager Register block which aggregates different peripheral function into one area. On 64 bit ARM parts, the system manager only can be accessed during EL3 mode, this driver model provide user the high level access to system register and abstract user from low level access. The base address of system manager can be retrieved using DT framework through the System Manager driver. Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
16 lines
472 B
C
16 lines
472 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2025 Altera Corporation <www.altera.com>
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*/
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struct altr_sysmgr_ops {
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int (*read)(struct udevice *dev, u32 *addr, u32 *value);
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int (*write)(struct udevice *dev, u32 *addr, u32 value);
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};
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struct altr_sysmgr_priv {
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void __iomem *regs;
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};
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#define altr_sysmgr_get_ops(dev) ((struct altr_sysmgr_ops *)(dev)->driver->ops)
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#define altr_sysmgr_get_priv(dev) ((struct altr_sysmgr_priv *)(dev_get_priv(dev)))
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