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https://github.com/u-boot/u-boot.git
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8b6227c229
The vop nodes does not need to be included in xPL control FDT, they only need to be included at U-Boot proper pre-reloc phase. Change to use bootph-some-ram prop to fix this. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
131 lines
2 KiB
Text
131 lines
2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Rockchip Electronics Co., Ltd
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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mmc2 = &sdio0;
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mmc3 = &sdio1;
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};
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chosen {
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u-boot,spl-boot-order = \
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"same-as-spl", &emmc, &sdmmc;
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};
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dmc: dmc@ff610000 {
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compatible = "rockchip,rk3288-dmc", "syscon";
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reg = <0x0 0xff610000 0x0 0x3fc
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0x0 0xff620000 0x0 0x294
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0x0 0xff630000 0x0 0x3fc
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0x0 0xff640000 0x0 0x294>;
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clocks = <&cru PCLK_DDRUPCTL0>, <&cru PCLK_PUBL0>,
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<&cru PCLK_DDRUPCTL1>, <&cru PCLK_PUBL1>,
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<&cru ARMCLK>;
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clock-names = "pclk_ddrupctl0", "pclk_publ0",
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"pclk_ddrupctl1", "pclk_publ1",
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"arm_clk";
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rockchip,cru = <&cru>;
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rockchip,grf = <&grf>;
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rockchip,noc = <&noc>;
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rockchip,pmu = <&pmu>;
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rockchip,sgrf = <&sgrf>;
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rockchip,sram = <&ddr_sram>;
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bootph-all;
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};
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noc: syscon@ffac0000 {
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compatible = "rockchip,rk3288-noc", "syscon";
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reg = <0x0 0xffac0000 0x0 0x2000>;
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bootph-all;
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};
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};
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#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
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&binman {
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rom {
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filename = "u-boot.rom";
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size = <0x400000>;
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pad-byte = <0xff>;
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mkimage {
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args = "-n rk3288 -T rkspi";
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u-boot-spl {
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};
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};
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u-boot-img {
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offset = <0x20000>;
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};
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u-boot {
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offset = <0x300000>;
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};
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fdtmap {
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};
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};
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};
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#endif
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&bus_intmem {
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ddr_sram: ddr-sram@1000 {
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compatible = "rockchip,rk3288-ddr-sram";
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reg = <0x1000 0x4000>;
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};
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};
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&cru {
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bootph-all;
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};
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&edp {
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clocks = <&cru SCLK_EDP>, <&cru SCLK_EDP_24M>, <&cru PCLK_EDP_CTRL>;
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clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
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};
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&gpio7 {
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bootph-all;
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};
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&grf {
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bootph-all;
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};
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&pmu {
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bootph-all;
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};
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&sgrf {
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bootph-all;
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};
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&uart0 {
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clock-frequency = <24000000>;
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};
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&uart1 {
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clock-frequency = <24000000>;
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};
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&uart2 {
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clock-frequency = <24000000>;
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};
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&uart3 {
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clock-frequency = <24000000>;
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};
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&vopb {
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bootph-some-ram;
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};
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&vopl {
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bootph-some-ram;
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};
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&xin24m {
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bootph-all;
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};
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