mirror of
https://github.com/u-boot/u-boot.git
synced 2025-04-17 02:15:02 +00:00
61f4e5f9cf
For some reason the Ethernet PHY reset delay is set to 1 second, this cause an unneccecery long boot delay. MiQi use RTL8211 Ethernet PHY, datasheet list an initial 10ms delay and then a 30-76ms delay before accessing registers. Change to use 80ms delay instead of a full second to speed up Ethernet initializion in U-Boot. Also enable PHY_REALTEK, DM_ETH_PHY and PHY_GIGE to improve Ethernet PHY support in U-Boot. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
111 lines
1.4 KiB
Text
111 lines
1.4 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Rockchip Electronics Co., Ltd
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*/
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#include "rk3288-u-boot.dtsi"
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&dmc {
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rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
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0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
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0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
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0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
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0x5 0x0>;
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rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
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0xa60 0x40 0x10 0x0>;
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rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
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};
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&emmc {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&emmc_bus8 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&emmc_clk {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&emmc_cmd {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&emmc_pwr {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gmac {
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snps,reset-delays-us = <0 10000 80000>;
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};
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&gpio7 {
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/delete-property/ bootph-all;
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bootph-pre-ram;
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};
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&pcfg_pull_none {
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bootph-all;
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};
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&pcfg_pull_none_12ma {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pcfg_pull_up {
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bootph-all;
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};
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&pcfg_pull_up_drv_12ma {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_bus4 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_cd {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_clk {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_cmd {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_pwr {
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bootph-pre-ram;
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};
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&uart2 {
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bootph-all;
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};
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&uart2_xfer {
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bootph-pre-sram;
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bootph-pre-ram;
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};
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&vcc_sd {
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bootph-pre-ram;
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};
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