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6d722894fd
Add support for Arm sbsa [1] v0.3+ that is supported by QEMU [2]. Unlike other Arm based platforms the machine only provides a minimal FDT that contains number of CPUs, ammount of memory and machine-version. The boot firmware has to provide ACPI tables to the OS. Due to this design a full DTB is added here as well that allows U-Boot's driver to properly function. The DTB is appended at the end of the U-Boot image and will be merged with the QEMU provided DTB. In addition provide documentation how to use, enable binman to fabricate both ROMs that are required to boot and add ACPI tables to make it full compatible to the EDK2 reference implementation. The board was tested using Fedora 40 Aarch64 Workstation. It's able to boot from USB and AHCI or network. Tested and found working: - serial - PCI - xHCI - Bochs display - AHCI - network using e1000e - CPU init - Booting Fedora 40 1: Server Base System Architecture (SBSA) 2: https://www.qemu.org/docs/master/system/arm/sbsa.html Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
138 lines
2.8 KiB
Text
138 lines
2.8 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Devicetree with onboard devices for qemu_sbsa-ref for internal use only!
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* DO NOT PASS TO THE OS!
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*
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* As QEMU provides only a minimal devicetree this one is merged with
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* it and then fixed at runtime.
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*
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* Copyright 2024 9elements GmbH
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*/
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#include "configs/qemu-sbsa.h"
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/dts-v1/;
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&intc>;
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compatible = "linux,sbsa-ref";
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binman: binman {
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multiple-images;
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};
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cpus {
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/* Filled by fdtdec_board_setup() */
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};
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memory {
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/* Filled by fdtdec_board_setup() */
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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cfi_flash {
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compatible = "cfi-flash";
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reg = /bits/ 64 <SBSA_FLASH_BASE_ADDR
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SBSA_FLASH_LENGTH>;
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status = "okay";
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};
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uart0 {
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compatible = "arm,pl011";
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status = "okay";
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reg = /bits/ 64 <SBSA_UART_BASE_ADDR
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SBSA_UART_LENGTH>;
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};
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ahci {
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compatible = "generic-ahci";
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status = "okay";
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reg = /bits/ 64 <0x60100000 0x00010000>;
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};
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xhci {
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compatible = "generic-xhci";
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status = "okay";
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reg = /bits/ 64 <0x60110000 0x00010000>;
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};
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pci {
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#address-cells = <3>;
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#size-cells = <2>;
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compatible = "pci-host-ecam-generic";
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device_type = "pci";
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status = "okay";
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reg = /bits/ 64 <0xf0000000 0x10000000>;
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bus-range = <0 0xff>;
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ranges = /bits/ 32 <0x01000000>,
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/bits/ 64 <0
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SBSA_PIO_BASE_ADDR
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SBSA_PIO_LENGTH>,
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/bits/ 32 <0x02000000>,
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/bits/ 64 <SBSA_PCIE_MMIO_BASE_ADDR
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SBSA_PCIE_MMIO_BASE_ADDR
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SBSA_PCIE_MMIO_LENGTH>,
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/bits/ 32 <0x43000000>,
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/bits/ 64 <SBSA_PCIE_MMIO_HIGH_BASE_ADDR
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SBSA_PCIE_MMIO_HIGH_BASE_ADDR
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SBSA_PCIE_MMIO_HIGH_LENGTH>;
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};
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};
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intc: interrupt-controller {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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status = "okay";
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interrupt-controller;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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reg = /bits/ 64 <SBSA_GIC_DIST_BASE_ADDR SBSA_GIC_DIST_LENGTH>,
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/bits/ 64 <SBSA_GIC_REDIST_BASE_ADDR SBSA_GIC_REDIST_LENGTH>,
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/bits/ 64 <0 0>,
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/bits/ 64 <SBSA_GIC_HBASE_ADDR SBSA_GIC_HBASE_LENGTH>,
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/bits/ 64 <SBSA_GIC_VBASE_ADDR SBSA_GIC_VBASE_LENGTH>;
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};
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its {
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compatible = "arm,gic-v3-its";
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status = "disabled";
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};
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};
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&binman {
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secure-world {
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filename = "secure-world.rom";
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size = <SBSA_SECURE_FLASH_LENGTH>;
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bl1 {
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offset = <0x0>;
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description = "ARM Trusted Firmware BL1";
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filename = "bl1.bin";
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type = "blob-ext";
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};
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fip {
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offset = <0x12000>;
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description = "ARM Trusted Firmware FIP";
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filename = "fip.bin";
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type = "blob-ext";
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};
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};
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unsecure-world {
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filename = "unsecure-world.rom";
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size = <SBSA_FLASH_LENGTH>;
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u-boot {
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};
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u-boot-dtb {
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compress = "lz4";
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};
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};
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};
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