mirror of
https://github.com/u-boot/u-boot.git
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ff9f080e59
Add i.MX91 11x11 EVK Board support. - Four ddr scripts included w/o inline ecc feature. - SDHC/NETWORK/I2C/UART supported - PCA9451 supported, default nominal drive mode - Documentation added. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
195 lines
2.4 KiB
Text
195 lines
2.4 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2024 NXP
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*/
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#include "imx91-u-boot.dtsi"
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/ {
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog3>;
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bootph-pre-ram;
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bootph-some-ram;
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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};
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&{/soc@0} {
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bootph-all;
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bootph-pre-ram;
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};
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&aips1 {
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bootph-pre-ram;
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bootph-all;
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};
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&aips2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&aips3 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&iomuxc {
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bootph-pre-ram;
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bootph-some-ram;
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};
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®_usdhc2_vmmc {
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u-boot,off-on-delay-us = <20000>;
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_reg_usdhc2_vmmc {
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bootph-pre-ram;
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};
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&pinctrl_uart1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_usdhc1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_usdhc2_gpio {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_usdhc2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio3 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio4 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&lpuart1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&usdhc1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&usdhc2 {
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bootph-pre-ram;
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bootph-some-ram;
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fsl,signal-voltage-switch-extra-delay-ms = <8>;
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};
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&lpi2c1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&lpi2c2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&lpi2c3 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&{/soc@0/bus@44000000/i2c@44350000/pmic@25} {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&{/soc@0/bus@44000000/i2c@44350000/pmic@25/regulators} {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_lpi2c1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_lpi2c2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_lpi2c3 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&fec {
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compatible = "fsl,imx91-fec", "fsl,imx93-fec", "fsl,imx8mq-fec";
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phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <15>;
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phy-reset-post-delay = <100>;
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};
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ðphy1 {
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reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
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reset-assert-us = <15000>;
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reset-deassert-us = <100000>;
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};
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&s4muap {
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bootph-pre-ram;
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bootph-some-ram;
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status = "okay";
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};
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&clk {
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bootph-all;
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bootph-pre-ram;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-rates;
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/delete-property/ assigned-clock-parents;
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};
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&osc_32k {
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bootph-all;
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bootph-pre-ram;
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};
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&osc_24m {
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bootph-all;
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bootph-pre-ram;
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};
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&clk_ext1 {
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bootph-all;
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bootph-pre-ram;
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};
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