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Add support for loading the secure & non-secure pdi images and PL bitstream on the Versal Gen2 platform. The FPGA driver is enabled to load the bitstream in PDI format on the AMD Versal Gen2 device. PDI is the new programmable device image format for Versal Gen2, and the bitstream for the Versal Gen2 platform is generated exclusively in this format. With the enhanced SMC format in TF-A ensuring transparent payload forwarding for Versal Gen2, the u-boot driver must now handle the word swapping of PDI address that was previously done in TF-A for this API. The source code for the Versal2 loadpdi command and the CONFIG_CMD_VERSAL2 configuration has been removed. It now utilizes the fpga load <dev> <address> <length> command to load secure & non-secure pdi images. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Link: https://lore.kernel.org/r/20250327105200.1262615-3-prasad.kummari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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| .. | ||
| ACEX1K.c | ||
| altera.c | ||
| cyclon2.c | ||
| fpga-uclass.c | ||
| fpga.c | ||
| intel_sdm_mb.c | ||
| ivm_core.c | ||
| Kconfig | ||
| lattice.c | ||
| Makefile | ||
| sandbox.c | ||
| socfpga.c | ||
| socfpga_arria10.c | ||
| socfpga_gen5.c | ||
| spartan2.c | ||
| spartan3.c | ||
| stratixII.c | ||
| stratixv.c | ||
| versalpl.c | ||
| virtex2.c | ||
| xilinx.c | ||
| zynqmppl.c | ||
| zynqpl.c | ||