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u-boot/drivers/ddr/imx/phy
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Ye Li 1b631589d4 imx9: Add 233Mhz DDR PLL frequency 
To support 1.866GTS LPDDR4x timing script, need to add 233Mhz freq
to DDR PLL for second mission point at 933MTS. Otherwise DDR training
will fail.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19 00:12:41 -03:00
..
ddrphy_csr.c ddr: imx: Add i.MX9 DDR controller driver 2022-07-26 11:29:01 +02:00
ddrphy_train.c drivers: ddr: Remove duplicate newlines 2024-07-22 10:53:05 -06:00
ddrphy_utils.c imx9: Add 233Mhz DDR PLL frequency 2024-09-19 00:12:41 -03:00
helper.c Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" 2024-05-20 13:35:03 -06:00
Kconfig ddr: imx: Add i.MX9 DDR controller driver 2022-07-26 11:29:01 +02:00
Makefile ddr: imx: Add i.MX9 DDR controller driver 2022-07-26 11:29:01 +02:00