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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
46 lines
1 KiB
C
46 lines
1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <linux/errno.h>
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#include <asm/mtrr.h>
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DECLARE_GLOBAL_DATA_PTR;
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int init_cache_f_r(void)
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{
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bool do_mtrr = CONFIG_IS_ENABLED(X86_32BIT_INIT) ||
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IS_ENABLED(CONFIG_FSP_VERSION2) ||
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(IS_ENABLED(CONFIG_TPL) && IS_ENABLED(CONFIG_HAVE_MRC));
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int ret;
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/*
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* Supported configurations:
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*
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* booting from slimbootloader - MTRRs are already set up
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* booting with FSPv1 - MTRRs are already set up
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* booting with FSPv2 or MRC - MTRRs must be set here
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* booting from coreboot - in this case there is no SPL, so we set up
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* the MTRRs here
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*/
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do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) &&
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!IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER);
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if (do_mtrr) {
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ret = mtrr_commit(false);
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/*
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* If MTRR MSR is not implemented by the processor, just ignore
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* it
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*/
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if (ret && ret != -ENOSYS)
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return ret;
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}
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/* Initialise the CPU cache(s) */
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return init_cache();
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}
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