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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
284 lines
6.6 KiB
C
284 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* linux/arch/powerpc/kernel/traps.c
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*
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* Copyright 2007 Freescale Semiconductor.
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* Copyright (C) 2003 Motorola
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* Modified by Xianghua Xiao(x.xiao@motorola.com)
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*
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modified by Cort Dougan (cort@cs.nmt.edu)
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* and Paul Mackerras (paulus@cs.anu.edu.au)
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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/*
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* This file handles the architecture-dependent parts of hardware exceptions
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*/
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#include <common.h>
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#include <asm/global_data.h>
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#include <asm/ptrace.h>
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#include <command.h>
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#include <init.h>
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#include <irq_func.h>
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#include <kgdb.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Returns 0 if exception not found and fixup otherwise. */
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extern unsigned long search_exception_table(unsigned long);
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/*
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* End of addressable memory. This may be less than the actual
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* amount of memory on the system if we're unable to keep all
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* the memory mapped in.
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*/
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#define END_OF_MEM (gd->ram_base + get_effective_memsize())
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static __inline__ void set_tsr(unsigned long val)
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{
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asm volatile("mtspr 0x150, %0" : : "r" (val));
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}
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static __inline__ unsigned long get_esr(void)
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{
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unsigned long val;
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asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
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return val;
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}
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#define ESR_MCI 0x80000000
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#define ESR_PIL 0x08000000
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#define ESR_PPR 0x04000000
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#define ESR_PTR 0x02000000
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#define ESR_DST 0x00800000
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#define ESR_DIZ 0x00400000
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#define ESR_U0F 0x00008000
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/*
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* Trap & Exception support
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*/
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static void print_backtrace(unsigned long *sp)
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{
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int cnt = 0;
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unsigned long i;
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printf("Call backtrace: ");
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while (sp) {
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if ((uint)sp > END_OF_MEM)
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break;
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i = sp[1];
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if (cnt++ % 7 == 0)
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printf("\n");
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printf("%08lX ", i);
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if (cnt > 32) break;
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sp = (unsigned long *)*sp;
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}
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printf("\n");
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}
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void show_regs(struct pt_regs *regs)
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{
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int i;
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printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
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regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
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printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
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regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
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regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
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regs->msr&MSR_IR ? 1 : 0,
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regs->msr&MSR_DR ? 1 : 0);
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printf("\n");
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for (i = 0; i < 32; i++) {
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if ((i % 8) == 0)
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{
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printf("GPR%02d: ", i);
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}
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printf("%08lX ", regs->gpr[i]);
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if ((i % 8) == 7)
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{
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printf("\n");
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}
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}
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}
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static void _exception(int signr, struct pt_regs *regs)
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{
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show_regs(regs);
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print_backtrace((unsigned long *)regs->gpr[1]);
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panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
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}
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void CritcalInputException(struct pt_regs *regs)
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{
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panic("Critical Input Exception");
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}
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int machinecheck_count = 0;
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int machinecheck_error = 0;
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void MachineCheckException(struct pt_regs *regs)
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{
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unsigned long fixup;
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unsigned int mcsr, mcsrr0, mcsrr1, mcar;
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/* Probing PCI using config cycles cause this exception
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* when a device is not present. Catch it and return to
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* the PCI exception handler.
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*/
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if ((fixup = search_exception_table(regs->nip)) != 0) {
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regs->nip = fixup;
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return;
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}
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mcsrr0 = mfspr(SPRN_MCSRR0);
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mcsrr1 = mfspr(SPRN_MCSRR1);
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mcsr = mfspr(SPRN_MCSR);
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mcar = mfspr(SPRN_MCAR);
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machinecheck_count++;
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machinecheck_error=1;
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#if defined(CONFIG_CMD_KGDB)
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if (debugger_exception_handler && (*debugger_exception_handler)(regs))
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return;
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#endif
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printf("Machine check in kernel mode.\n");
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printf("Caused by (from mcsr): ");
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printf("mcsr = 0x%08x\n", mcsr);
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if (mcsr & 0x80000000)
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printf("Machine check input pin\n");
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if (mcsr & 0x40000000)
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printf("Instruction cache parity error\n");
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if (mcsr & 0x20000000)
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printf("Data cache push parity error\n");
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if (mcsr & 0x10000000)
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printf("Data cache parity error\n");
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if (mcsr & 0x00000080)
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printf("Bus instruction address error\n");
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if (mcsr & 0x00000040)
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printf("Bus Read address error\n");
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if (mcsr & 0x00000020)
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printf("Bus Write address error\n");
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if (mcsr & 0x00000010)
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printf("Bus Instruction data bus error\n");
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if (mcsr & 0x00000008)
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printf("Bus Read data bus error\n");
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if (mcsr & 0x00000004)
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printf("Bus Write bus error\n");
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if (mcsr & 0x00000002)
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printf("Bus Instruction parity error\n");
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if (mcsr & 0x00000001)
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printf("Bus Read parity error\n");
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show_regs(regs);
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printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
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mcsr, mcsrr0, mcsrr1, mcar);
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print_backtrace((unsigned long *)regs->gpr[1]);
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if (machinecheck_count > 10) {
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panic("machine check count too high\n");
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}
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if (machinecheck_count > 1) {
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regs->nip += 4; /* skip offending instruction */
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printf("Skipping current instr, Returning to 0x%08lx\n",
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regs->nip);
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} else {
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printf("Returning back to 0x%08lx\n",regs->nip);
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}
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}
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void AlignmentException(struct pt_regs *regs)
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{
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#if defined(CONFIG_CMD_KGDB)
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if (debugger_exception_handler && (*debugger_exception_handler)(regs))
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return;
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#endif
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show_regs(regs);
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print_backtrace((unsigned long *)regs->gpr[1]);
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panic("Alignment Exception");
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}
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void ProgramCheckException(struct pt_regs *regs)
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{
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long esr_val;
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#if defined(CONFIG_CMD_KGDB)
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if (debugger_exception_handler && (*debugger_exception_handler)(regs))
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return;
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#endif
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show_regs(regs);
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esr_val = get_esr();
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if( esr_val & ESR_PIL )
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printf( "** Illegal Instruction **\n" );
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else if( esr_val & ESR_PPR )
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printf( "** Privileged Instruction **\n" );
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else if( esr_val & ESR_PTR )
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printf( "** Trap Instruction **\n" );
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print_backtrace((unsigned long *)regs->gpr[1]);
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panic("Program Check Exception");
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}
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void PITException(struct pt_regs *regs)
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{
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/*
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* Reset PIT interrupt
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*/
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set_tsr(0x0c000000);
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/*
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* Call timer_interrupt routine in interrupts.c
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*/
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timer_interrupt(NULL);
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}
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void UnknownException(struct pt_regs *regs)
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{
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#if defined(CONFIG_CMD_KGDB)
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if (debugger_exception_handler && (*debugger_exception_handler)(regs))
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return;
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#endif
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printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
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regs->nip, regs->msr, regs->trap);
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_exception(0, regs);
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}
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void ExtIntException(struct pt_regs *regs)
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{
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volatile ccsr_pic_t *pic = (void *)(CFG_SYS_MPC8xxx_PIC_ADDR);
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uint vect;
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#if defined(CONFIG_CMD_KGDB)
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if (debugger_exception_handler && (*debugger_exception_handler)(regs))
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return;
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#endif
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printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
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regs->nip, regs->msr, regs->trap);
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vect = pic->iack0;
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printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect);
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show_regs(regs);
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print_backtrace((unsigned long *)regs->gpr[1]);
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}
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void DebugException(struct pt_regs *regs)
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{
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printf("Debugger trap at @ %lx\n", regs->nip );
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show_regs(regs);
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}
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