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35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
51 lines
1.5 KiB
C
51 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
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*/
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#ifndef _RESET_MANAGER_H_
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#define _RESET_MANAGER_H_
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phys_addr_t socfpga_get_rstmgr_addr(void);
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void reset_cpu(void);
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void socfpga_per_reset(u32 reset, int set);
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void socfpga_per_reset_all(void);
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#define RSTMGR_CTRL_SWCOLDRSTREQ_LSB 0
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#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
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/*
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* Define a reset identifier, from which a permodrst bank ID
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* and reset ID can be extracted using the subsequent macros
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* RSTMGR_RESET() and RSTMGR_BANK().
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*/
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#define RSTMGR_BANK_OFFSET 8
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#define RSTMGR_BANK_MASK 0x7
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#define RSTMGR_RESET_OFFSET 0
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#define RSTMGR_RESET_MASK 0x1f
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#define RSTMGR_DEFINE(_bank, _offset) \
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((_bank) << RSTMGR_BANK_OFFSET) | ((_offset) << RSTMGR_RESET_OFFSET)
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/* Extract reset ID from the reset identifier. */
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#define RSTMGR_RESET(_reset) \
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(((_reset) >> RSTMGR_RESET_OFFSET) & RSTMGR_RESET_MASK)
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/* Extract bank ID from the reset identifier. */
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#define RSTMGR_BANK(_reset) \
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(((_reset) >> RSTMGR_BANK_OFFSET) & RSTMGR_BANK_MASK)
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/* Create a human-readable reference to SoCFPGA reset. */
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#define SOCFPGA_RESET(_name) RSTMGR_##_name
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#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
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#include <asm/arch/reset_manager_gen5.h>
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#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
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#include <asm/arch/reset_manager_arria10.h>
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#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
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defined(CONFIG_TARGET_SOCFPGA_AGILEX)
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#include <asm/arch/reset_manager_soc64.h>
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#endif
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#endif /* _RESET_MANAGER_H_ */
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