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The AEMIF's bindings in the Linux tree have a node for the AEMIF controller and then a node for each AEMIF's chip select. This CS node doesn't have a compatible property but describes the timing parameters used by a given chip select. The U-Boot DM framework expects every node to have a 'compatible' property. If no 'compatible' is present in a node, its children won't be parsed by u-boot. Add DM support to the ti-aemif driver. Add a new ti-aemif-cs driver to comply with the Linux bindings and the U-Boot's DM philosophy. This driver handles the timing parameters of an AEMIF's chip select so move aemif_cs_configure() from ti-aemif.c to ti-aemif-cs.c. Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
59 lines
1.3 KiB
C
59 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Keystone2: Asynchronous EMIF Configuration
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*
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* (C) Copyright 2012-2014
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* Texas Instruments Incorporated, <www.ti.com>
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*/
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#include <asm/arch/hardware.h>
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#include <asm/io.h>
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#include <asm/ti-common/ti-aemif.h>
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#include <dm.h>
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#include "ti-aemif-cs.h"
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#define AEMIF_WAITCYCLE_CONFIG (0x4)
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#define AEMIF_NAND_CONTROL (0x60)
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#define AEMIF_ONENAND_CONTROL (0x5c)
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static void aemif_configure(int cs, struct aemif_config *cfg)
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{
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unsigned long tmp;
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if (cfg->mode == AEMIF_MODE_NAND) {
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tmp = __raw_readl(cfg->base + AEMIF_NAND_CONTROL);
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tmp |= (1 << cs);
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__raw_writel(tmp, cfg->base + AEMIF_NAND_CONTROL);
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} else if (cfg->mode == AEMIF_MODE_ONENAND) {
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tmp = __raw_readl(cfg->base + AEMIF_ONENAND_CONTROL);
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tmp |= (1 << cs);
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__raw_writel(tmp, cfg->base + AEMIF_ONENAND_CONTROL);
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}
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aemif_cs_configure(cs, cfg);
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}
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void aemif_init(int num_cs, struct aemif_config *config)
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{
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int cs;
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if (num_cs > AEMIF_NUM_CS) {
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num_cs = AEMIF_NUM_CS;
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printf("AEMIF: csnum has to be <= 5");
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}
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for (cs = 0; cs < num_cs; cs++)
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aemif_configure(cs, config + cs);
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}
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static const struct udevice_id aemif_ids[] = {
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{ .compatible = "ti,da850-aemif", },
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{},
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};
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U_BOOT_DRIVER(ti_aemif) = {
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.name = "ti_aemif",
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.id = UCLASS_MEMORY,
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.of_match = aemif_ids,
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};
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