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Add some brief documentation on using dump_pagetables() to print out U-Boot's pagetables during boot. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
109 lines
4.6 KiB
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109 lines
4.6 KiB
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.. SPDX-License-Identifier: GPL-2.0+
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ARM64
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=====
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Summary
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-------
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The initial arm64 U-Boot port was developed before hardware was available,
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so the first supported platforms were the Foundation and Fast Model for ARMv8.
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These days U-Boot runs on a variety of 64-bit capable ARM hardware, from
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embedded development boards to servers.
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Notes
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-----
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1. U-Boot can run at any exception level it is entered in, it is
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recommened to enter it in EL3 if U-Boot takes some responsibilities of a
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classical firmware (like initial hardware setup, CPU errata workarounds
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or SMP bringup). U-Boot can be entered in EL2 when its main purpose is
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that of a boot loader. It can drop to lower exception levels before
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entering the OS. For ARMv8-R it is recommened to enter at S-EL1, as for this
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architecture there is no S-EL3.
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2. U-Boot for arm64 is compiled with AArch64-gcc. AArch64-gcc
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use rela relocation format, a tool(tools/relocate-rela) by Scott Wood
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is used to encode the initial addend of rela to u-boot.bin. After running,
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the U-Boot will be relocated to destination again.
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3. Earlier Linux kernel versions required the FDT to be placed at a
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2 MB boundary and within the same 512 MB section as the kernel image,
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resulting in fdt_high to be defined specially.
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Since kernel version 4.2 Linux is more relaxed about the DT location, so it
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can be placed anywhere in memory.
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Please reference linux/Documentation/arm64/booting.txt for detail.
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4. Spin-table is used to wake up secondary processors. One location
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(or per processor location) is defined to hold the kernel entry point
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for secondary processors. It must be ensured that the location is
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accessible and zero immediately after secondary processor
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enter slave_cpu branch execution in start.S. The location address
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is encoded in cpu node of DTS. Linux kernel store the entry point
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of secondary processors to it and send event to wakeup secondary
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processors.
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Please reference linux/Documentation/arm64/booting.txt for detail.
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5. Generic board is supported.
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6. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and
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aarch32 specific codes.
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MMU
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---
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U-Boot uses a simple page table for MMU setup. It uses the smallest number of bits
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possible for the virtual address based on the maximum memory address (see the logic
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in ``get_tcr()``). If this is less than 39 bits, the MMU will use only 3 levels for
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address translation.
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As with all platforms, U-Boot on ARM64 uses a 1:1 mapping of virtual to physical addresses.
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In general, the memory map is expected to remain static once the MMU is enabled.
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Software pagetable walker
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^^^^^^^^^^^^^^^^^^^^^^^^^
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It is possible to debug the pagetable generated by U-Boot with the built in
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``dump_pagetable()`` and ``walk_pagetable()`` functions (the former being a simple
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wrapper for the latter). For example the following can be added to ``setup_all_pgtables()``
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after the first call to ``setup_pgtables()``:
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.. code-block:: c
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dump_pagetable(gd->arch.tlb_addr, get_tcr(NULL, NULL));
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.. kernel-doc:: arch/arm/cpu/armv8/cache_v8.c
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:identifiers: __pagetable_walk pagetable_print_entry
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The pagetable walker can be used as follows:
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.. kernel-doc:: arch/arm/include/asm/armv8/mmu.h
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:identifiers: pte_walker_cb_t walk_pagetable dump_pagetable
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This will result in a print like the following:
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.. code-block:: text
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Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels
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[0x17df91000] | Table | |
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[0x17df92000] | Table | |
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[0x000001000 - 0x000200000] | Pages | Device-nGnRnE | Non-shareable
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[0x000200000 - 0x040000000] | Block | Device-nGnRnE | Non-shareable
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[0x040000000 - 0x080000000] | Block | Device-nGnRnE | Non-shareable
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[0x080000000 - 0x140000000] | Block | Normal | Inner-shareable
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[0x17df93000] | Table | |
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[0x140000000 - 0x17de00000] | Block | Normal | Inner-shareable
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[0x17df94000] | Table | |
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[0x17de00000 - 0x17dfa0000] | Pages | Normal | Inner-shareable
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For more information, please refer to the additional function documentation in
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``arch/arm/include/asm/armv8/mmu.h``.
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Contributors
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------------
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* Tom Rini <trini@ti.com>
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* Scott Wood <scottwood@freescale.com>
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* York Sun <yorksun@freescale.com>
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* Simon Glass <sjg@chromium.org>
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* Sharma Bhupesh <bhupesh.sharma@freescale.com>
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* Rob Herring <robherring2@gmail.com>
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* Sergey Temerkhanov <s.temerkhanov@gmail.com>
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