mirror of
https://github.com/u-boot/u-boot.git
synced 2025-04-16 01:44:34 +00:00
7fe55182d9
microblaze: - Disable JFFS2 fpga: - pass compatible flag to fpga_load() zynqmp: - SOM RTC fix - SC(system controller) PMW polarity fix - Fix ram_top calculation with introducing XILINX_MINI - Fix RPU release command versal: - Enable capsule update - Enable soft reset and Micron octal flashes xilinx: - Align Kconfig regarding SPI_STACKED_PARALLEL bootcount: - Add new zynqmp driver -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZzyoqgAKCRDKSWXLKUoM IapRAJ43XGmKG7VAzbf/i39GUmCaSgMBswCfRsyWtnhaUFC9qo/WfZN2+C6QkEU= =1LxQ -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze AMD/Xilinx changes for v2025.01-rc3: - microblaze: - Disable JFFS2 - fpga: - pass compatible flag to fpga_load() - zynqmp: - SOM RTC fix - SC(system controller) PMW polarity fix - Fix ram_top calculation with introducing XILINX_MINI - Fix RPU release command - versal: - Enable capsule update - Enable soft reset and Micron octal flashes - xilinx: - Align Kconfig regarding SPI_STACKED_PARALLEL - bootcount: - Add new zynqmp driver
169 lines
4 KiB
Text
169 lines
4 KiB
Text
CONFIG_ARM=y
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CONFIG_COUNTER_FREQUENCY=100000000
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CONFIG_POSITION_INDEPENDENT=y
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CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864
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CONFIG_ARCH_VERSAL=y
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CONFIG_TEXT_BASE=0x8000000
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CONFIG_SYS_MALLOC_LEN=0x4000000
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CONFIG_SYS_MALLOC_F_LEN=0x100000
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CONFIG_NR_DRAM_BANKS=36
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt"
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CONFIG_OF_LIBFDT_OVERLAY=y
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CONFIG_DM_RESET=y
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CONFIG_SYS_BOOTM_LEN=0x6400000
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CONFIG_SYS_LOAD_ADDR=0x8000000
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CONFIG_ENV_OFFSET_REDUND=0x7F00000
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CONFIG_CMD_FRU=y
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CONFIG_DEFINE_TCM_OCM_MMAP=y
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CONFIG_SYS_MEMTEST_START=0x00000000
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CONFIG_SYS_MEMTEST_END=0x00001000
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CONFIG_REMAKE_ELF=y
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CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
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CONFIG_EFI_CAPSULE_ON_DISK=y
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CONFIG_EFI_CAPSULE_ON_DISK_EARLY=y
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CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
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CONFIG_EFI_HTTP_BOOT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BOOTDELAY=5
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# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
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CONFIG_USE_PREBOOT=y
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CONFIG_SYS_PBSIZE=2073
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CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_CLOCKS=y
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CONFIG_SYS_PROMPT="Versal> "
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CONFIG_CMD_SMBIOS=y
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CONFIG_CMD_BOOTMENU=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_NVEDIT_EFI=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_SYS_ALT_MEMTEST=y
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CONFIG_CMD_SHA1SUM=y
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CONFIG_CMD_CLK=y
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CONFIG_CMD_DFU=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_MMC_SPEED_MODE_SET=y
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CONFIG_CMD_MTD=y
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CONFIG_CMD_SF_TEST=y
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CONFIG_CMD_USB=y
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CONFIG_BOOTP_MAY_FAIL=y
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CONFIG_BOOTP_BOOTFILESIZE=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_NFS=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EFIDEBUG=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_RNG=y
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CONFIG_CMD_KASLRSEED=y
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CONFIG_CMD_TIMER=y
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CONFIG_CMD_SMC=y
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CONFIG_CMD_TPM=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_SQUASHFS=y
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CONFIG_CMD_MTDPARTS=y
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CONFIG_CMD_UBI=y
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CONFIG_PARTITION_TYPE_GUID=y
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CONFIG_OF_BOARD=y
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CONFIG_ENV_IS_NOWHERE=y
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CONFIG_ENV_IS_IN_FAT=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NETCONSOLE=y
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CONFIG_IP_DEFRAG=y
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CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_TFTP_BLOCKSIZE=4096
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CONFIG_SIMPLE_PM_BUS=y
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CONFIG_CLK_VERSAL=y
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CONFIG_DFU_TIMEOUT=y
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1800000
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CONFIG_ARM_FFA_TRANSPORT=y
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CONFIG_FPGA_XILINX=y
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CONFIG_FPGA_VERSALPL=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_CADENCE=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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CONFIG_DM_MAILBOX=y
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CONFIG_ZYNQMP_IPI=y
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CONFIG_MISC=y
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CONFIG_NVMEM=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ZYNQ=y
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CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_SOFT_RESET=y
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CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
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CONFIG_SPI_FLASH_GIGADEVICE=y
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CONFIG_SPI_FLASH_ISSI=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_MT35XU=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_SPI_FLASH_WINBOND=y
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# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
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CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHY_ANEG_TIMEOUT=20000
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CONFIG_PHY_ADIN=y
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_NATSEMI=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_TI_DP83867=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_FIXED=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_PHY_GIGE=y
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CONFIG_XILINX_AXIEMAC=y
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CONFIG_XILINX_AXIMRMAC=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_POWER_DOMAIN=y
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CONFIG_ZYNQMP_POWER_DOMAIN=y
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CONFIG_RESET_ZYNQMP=y
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CONFIG_ARM_DCC=y
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CONFIG_PL01X_SERIAL=y
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CONFIG_XILINX_UARTLITE=y
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CONFIG_SOC_XILINX_VERSAL=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_CADENCE_QSPI=y
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CONFIG_HAS_CQSPI_REF_CLK=y
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CONFIG_CQSPI_REF_CLK=200000000
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CONFIG_CADENCE_OSPI_VERSAL=y
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CONFIG_ZYNQ_SPI=y
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CONFIG_ZYNQMP_GQSPI=y
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CONFIG_SPI_STACKED_PARALLEL=y
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CONFIG_SYSRESET=y
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CONFIG_SYSRESET_PSCI=y
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CONFIG_TPM2_TIS_SPI=y
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CONFIG_USB=y
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CONFIG_DM_USB_GADGET=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
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CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
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CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
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CONFIG_USB_GADGET_DOWNLOAD=y
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CONFIG_USB_FUNCTION_THOR=y
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CONFIG_VIRTIO_MMIO=y
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CONFIG_VIRTIO_NET=y
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CONFIG_VIRTIO_BLK=y
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CONFIG_TPM=y
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