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This uclass is intended to manage IOMMUs on systems where the IOMMUs are not in bypass mode by default. In that case U-Boot cannot ignore the IOMMUs if it wants to use devices that need to do DMA and sit behind such an IOMMU. This initial IOMMU uclass implementation does not implement and device ops and is intended for IOMMUs that have a bypass mode that does not require address translation. Support for IOMMUs that do require address translation is planned and device ops will be defined when support for such IOMMUs will be added. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
141 lines
5.5 KiB
C
141 lines
5.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2013 Google, Inc
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*
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* (C) Copyright 2012
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* Pavel Herrmann <morpheus.ibis@gmail.com>
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*/
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#ifndef _DM_UCLASS_ID_H
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#define _DM_UCLASS_ID_H
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/* TODO(sjg@chromium.org): this could be compile-time generated */
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enum uclass_id {
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/* These are used internally by driver model */
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UCLASS_ROOT = 0,
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UCLASS_DEMO,
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UCLASS_TEST,
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UCLASS_TEST_FDT,
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UCLASS_TEST_FDT_MANUAL,
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UCLASS_TEST_BUS,
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UCLASS_TEST_PROBE,
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UCLASS_TEST_DUMMY,
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UCLASS_TEST_DEVRES,
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UCLASS_TEST_ACPI,
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UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
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UCLASS_I2C_EMUL, /* sandbox I2C device emulator */
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UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */
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UCLASS_PCI_EMUL, /* sandbox PCI device emulator */
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UCLASS_PCI_EMUL_PARENT, /* parent for PCI device emulators */
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UCLASS_USB_EMUL, /* sandbox USB bus device emulator */
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UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */
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/* U-Boot uclasses start here - in alphabetical order */
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UCLASS_ACPI_PMC, /* (x86) Power-management controller (PMC) */
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UCLASS_ADC, /* Analog-to-digital converter */
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UCLASS_AHCI, /* SATA disk controller */
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UCLASS_AUDIO_CODEC, /* Audio codec with control and data path */
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UCLASS_AXI, /* AXI bus */
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UCLASS_BLK, /* Block device */
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UCLASS_BOOTCOUNT, /* Bootcount backing store */
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UCLASS_BUTTON, /* Button */
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UCLASS_CACHE, /* Cache controller */
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UCLASS_CLK, /* Clock source, e.g. used by peripherals */
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UCLASS_CPU, /* CPU, typically part of an SoC */
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UCLASS_CROS_EC, /* Chrome OS EC */
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UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
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UCLASS_DSI_HOST, /* Display Serial Interface host */
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UCLASS_DMA, /* Direct Memory Access */
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UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */
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UCLASS_ECDSA, /* Elliptic curve cryptographic device */
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UCLASS_EFI, /* EFI managed devices */
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UCLASS_ETH, /* Ethernet device */
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UCLASS_ETH_PHY, /* Ethernet PHY device */
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UCLASS_FIRMWARE, /* Firmware */
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UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
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UCLASS_GPIO, /* Bank of general-purpose I/O pins */
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UCLASS_HASH, /* Hash device */
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UCLASS_HWSPINLOCK, /* Hardware semaphores */
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UCLASS_I2C, /* I2C bus */
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UCLASS_I2C_EEPROM, /* I2C EEPROM device */
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UCLASS_I2C_GENERIC, /* Generic I2C device */
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UCLASS_I2C_MUX, /* I2C multiplexer */
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UCLASS_I2S, /* I2S bus */
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UCLASS_IDE, /* IDE device */
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UCLASS_IOMMU, /* IOMMU */
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UCLASS_IRQ, /* Interrupt controller */
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UCLASS_KEYBOARD, /* Keyboard input device */
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UCLASS_LED, /* Light-emitting diode (LED) */
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UCLASS_LPC, /* x86 'low pin count' interface */
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UCLASS_MAILBOX, /* Mailbox controller */
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UCLASS_MASS_STORAGE, /* Mass storage device */
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UCLASS_MDIO, /* MDIO bus */
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UCLASS_MDIO_MUX, /* MDIO MUX/switch */
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UCLASS_MISC, /* Miscellaneous device */
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UCLASS_MMC, /* SD / MMC card or chip */
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UCLASS_MOD_EXP, /* RSA Mod Exp device */
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UCLASS_MTD, /* Memory Technology Device (MTD) device */
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UCLASS_MUX, /* Multiplexer device */
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UCLASS_NOP, /* No-op devices */
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UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */
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UCLASS_NVME, /* NVM Express device */
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UCLASS_P2SB, /* (x86) Primary-to-Sideband Bus */
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UCLASS_PANEL, /* Display panel, such as an LCD */
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UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
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UCLASS_PCH, /* x86 platform controller hub */
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UCLASS_PCI, /* PCI bus */
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UCLASS_PCI_EP, /* PCI endpoint device */
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UCLASS_PCI_GENERIC, /* Generic PCI bus device */
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UCLASS_PHY, /* Physical Layer (PHY) device */
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UCLASS_PINCONFIG, /* Pin configuration node device */
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UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
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UCLASS_PMIC, /* PMIC I/O device */
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UCLASS_POWER_DOMAIN, /* (SoC) Power domains */
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UCLASS_PWM, /* Pulse-width modulator */
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UCLASS_PWRSEQ, /* Power sequence device */
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UCLASS_QFW, /* QEMU firmware config device */
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UCLASS_RAM, /* RAM controller */
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UCLASS_REBOOT_MODE, /* Reboot mode */
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UCLASS_REGULATOR, /* Regulator device */
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UCLASS_REMOTEPROC, /* Remote Processor device */
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UCLASS_RESET, /* Reset controller device */
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UCLASS_RNG, /* Random Number Generator */
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UCLASS_RTC, /* Real time clock device */
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UCLASS_SCMI_AGENT, /* Interface with an SCMI server */
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UCLASS_SCSI, /* SCSI device */
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UCLASS_SERIAL, /* Serial UART */
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UCLASS_SIMPLE_BUS, /* Bus with child devices */
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UCLASS_SMEM, /* Shared memory interface */
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UCLASS_SOC, /* SOC Device */
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UCLASS_SOUND, /* Playing simple sounds */
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UCLASS_SPI, /* SPI bus */
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UCLASS_SPI_FLASH, /* SPI flash */
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UCLASS_SPI_GENERIC, /* Generic SPI flash target */
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UCLASS_SPMI, /* System Power Management Interface bus */
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UCLASS_SYSCON, /* System configuration device */
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UCLASS_SYSINFO, /* Device information from hardware */
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UCLASS_SYSRESET, /* System reset device */
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UCLASS_TEE, /* Trusted Execution Environment device */
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UCLASS_THERMAL, /* Thermal sensor */
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UCLASS_TIMER, /* Timer device */
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UCLASS_TPM, /* Trusted Platform Module TIS interface */
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UCLASS_UFS, /* Universal Flash Storage */
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UCLASS_USB, /* USB bus */
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UCLASS_USB_DEV_GENERIC, /* USB generic device */
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UCLASS_USB_HUB, /* USB hub */
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UCLASS_USB_GADGET_GENERIC, /* USB generic device */
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UCLASS_VIDEO, /* Video or LCD device */
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UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */
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UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */
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UCLASS_VIDEO_OSD, /* On-screen display */
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UCLASS_VIRTIO, /* VirtIO transport device */
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UCLASS_W1, /* Dallas 1-Wire bus */
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UCLASS_W1_EEPROM, /* one-wire EEPROMs */
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UCLASS_WDT, /* Watchdog Timer driver */
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UCLASS_PVBLOCK, /* Xen virtual block device */
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UCLASS_COUNT,
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UCLASS_INVALID = -1,
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};
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#endif
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