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3330c8880c
Switch to use the IO-domain driver to configure IO-domain based on device tree instead of a setup_iodomain() function. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
56 lines
1.1 KiB
C
56 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 Google
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*/
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#include <dm.h>
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#include <init.h>
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#include <asm/arch-rockchip/clock.h>
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#ifdef CONFIG_SPL_BUILD
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/* provided to defeat compiler optimisation in board_init_f() */
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void gru_dummy_function(int i)
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{
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}
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int board_early_init_f(void)
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{
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# if defined(CONFIG_TARGET_CHROMEBOOK_BOB) || defined(CONFIG_TARGET_CHROMEBOOK_KEVIN)
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int sum, i;
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/*
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* Add a delay and ensure that the compiler does not optimise this out.
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* This is needed since the power rails tail a while to turn on, and
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* we get garbage serial output otherwise.
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*/
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sum = 0;
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for (i = 0; i < 150000; i++)
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sum += i;
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gru_dummy_function(sum);
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#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
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return 0;
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}
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#endif
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#ifndef CONFIG_SPL_BUILD
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int board_early_init_r(void)
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{
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struct udevice *clk;
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int ret;
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/*
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* This init is done in SPL, but when chain-loading U-Boot SPL will
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* have been skipped. Allow the clock driver to check if it needs
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* setting up.
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*/
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ret = uclass_get_device_by_driver(UCLASS_CLK,
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DM_DRIVER_GET(clk_rk3399), &clk);
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if (ret) {
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debug("%s: CLK init failed: %d\n", __func__, ret);
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return ret;
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}
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return 0;
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}
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#endif
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