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Add ADC button detect for early SPL stage for RGxx3 device. This is important because on at least the RG353P and RG353V a clk pin is not exposed that would allow us to take the eMMC out of the boot path. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
555 lines
14 KiB
C
555 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2023 Chris Morgan <macromorgan@hotmail.com>
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*/
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#include <abuf.h>
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#include <adc.h>
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#include <asm/io.h>
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#include <command.h>
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#include <display.h>
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#include <dm.h>
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#include <dm/lists.h>
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#include <env.h>
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#include <fdt_support.h>
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#include <linux/delay.h>
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#include <linux/iopoll.h>
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#include <mipi_dsi.h>
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#include <mmc.h>
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#include <panel.h>
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#include <pwm.h>
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#include <stdlib.h>
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#include <video_bridge.h>
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#define BOOT_BROM_DOWNLOAD 0xef08a53c
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#define GPIO0_BASE 0xfdd60000
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#define GPIO4_BASE 0xfe770000
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#define GPIO_SWPORT_DR_L 0x0000
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#define GPIO_SWPORT_DR_H 0x0004
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#define GPIO_SWPORT_DDR_L 0x0008
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#define GPIO_SWPORT_DDR_H 0x000c
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#define GPIO_A0 BIT(0)
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#define GPIO_C5 BIT(5)
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#define GPIO_C6 BIT(6)
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#define GPIO_C7 BIT(7)
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#define GPIO_WRITEMASK(bits) ((bits) << 16)
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#define SARADC_BASE 0xfe720000
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#define SARADC_DATA 0x0000
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#define SARADC_STAS 0x0004
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#define SARADC_ADC_STATUS BIT(0)
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#define SARADC_CTRL 0x0008
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#define SARADC_INPUT_SRC_MSK 0x7
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#define SARADC_POWER_CTRL BIT(3)
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#define DTB_DIR "rockchip/"
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struct rg3xx_model {
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const u16 adc_value;
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const char *board;
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const char *board_name;
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const char *fdtfile;
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const bool detect_panel;
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};
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enum rgxx3_device_id {
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RG353M,
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RG353P,
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RG353V,
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RG503,
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RGB30,
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RK2023,
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RGARCD,
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RGB10MAX3,
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/* Devices with duplicate ADC value */
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RG353PS,
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RG353VS,
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RGARCS,
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};
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static const struct rg3xx_model rg3xx_model_details[] = {
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[RG353M] = {
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.adc_value = 517, /* Observed average from device */
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.board = "rk3566-anbernic-rg353m",
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.board_name = "RG353M",
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/* Device is identical to RG353P. */
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.fdtfile = DTB_DIR "rk3566-anbernic-rg353p.dtb",
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.detect_panel = 1,
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},
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[RG353P] = {
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.adc_value = 860, /* Documented value of 860 */
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.board = "rk3566-anbernic-rg353p",
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.board_name = "RG353P",
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.fdtfile = DTB_DIR "rk3566-anbernic-rg353p.dtb",
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.detect_panel = 1,
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},
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[RG353V] = {
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.adc_value = 695, /* Observed average from device */
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.board = "rk3566-anbernic-rg353v",
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.board_name = "RG353V",
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.fdtfile = DTB_DIR "rk3566-anbernic-rg353v.dtb",
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.detect_panel = 1,
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},
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[RG503] = {
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.adc_value = 1023, /* Observed average from device */
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.board = "rk3566-anbernic-rg503",
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.board_name = "RG503",
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.fdtfile = DTB_DIR "rk3566-anbernic-rg503.dtb",
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.detect_panel = 0,
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},
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[RGB30] = {
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.adc_value = 383, /* Gathered from second hand information */
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.board = "rk3566-powkiddy-rgb30",
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.board_name = "RGB30",
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.fdtfile = DTB_DIR "rk3566-powkiddy-rgb30.dtb",
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.detect_panel = 0,
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},
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[RK2023] = {
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.adc_value = 635, /* Observed average from device */
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.board = "rk3566-powkiddy-rk2023",
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.board_name = "RK2023",
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.fdtfile = DTB_DIR "rk3566-powkiddy-rk2023.dtb",
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.detect_panel = 0,
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},
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[RGARCD] = {
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.adc_value = 183, /* Observed average from device */
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.board = "rk3566-anbernic-rg-arc-d",
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.board_name = "Anbernic RG ARC-D",
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.fdtfile = DTB_DIR "rk3566-anbernic-rg-arc-d.dtb",
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.detect_panel = 0,
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},
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[RGB10MAX3] = {
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.adc_value = 765, /* Observed average from device */
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.board = "rk3566-powkiddy-rgb10max3",
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.board_name = "Powkiddy RGB10MAX3",
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.fdtfile = DTB_DIR "rk3566-powkiddy-rgb10max3.dtb",
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.detect_panel = 0,
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},
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/* Devices with duplicate ADC value */
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[RG353PS] = {
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.adc_value = 860, /* Observed average from device */
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.board = "rk3566-anbernic-rg353ps",
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.board_name = "RG353PS",
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.fdtfile = DTB_DIR "rk3566-anbernic-rg353ps.dtb",
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.detect_panel = 1,
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},
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[RG353VS] = {
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.adc_value = 695, /* Gathered from second hand information */
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.board = "rk3566-anbernic-rg353vs",
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.board_name = "RG353VS",
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.fdtfile = DTB_DIR "rk3566-anbernic-rg353vs.dtb",
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.detect_panel = 1,
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},
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[RGARCS] = {
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.adc_value = 183, /* Observed average from device */
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.board = "rk3566-anbernic-rg-arc-s",
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.board_name = "Anbernic RG ARC-S",
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.fdtfile = DTB_DIR "rk3566-anbernic-rg-arc-s.dtb",
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.detect_panel = 0,
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},
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};
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struct rg353_panel {
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const u16 id;
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const char *panel_compat[2];
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};
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static const struct rg353_panel rg353_panel_details[] = {
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{
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.id = 0x3052,
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.panel_compat[0] = "anbernic,rg353p-panel",
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.panel_compat[1] = "newvision,nv3051d",
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},
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{
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.id = 0x3821,
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.panel_compat[0] = "anbernic,rg353v-panel-v2",
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.panel_compat[1] = NULL,
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},
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};
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/*
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* The device has internal eMMC, and while some devices have an exposed
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* clk pin you can ground to force a bypass not all devices do. As a
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* result it may be possible for some devices to become a perma-brick
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* if a corrupted TPL or SPL stage with a valid header is flashed to
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* the internal eMMC. Add functionality to read ADC channel 0 (the func
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* button) as early as possible in the boot process to provide some
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* protection against this. If we ever get an open TPL stage, we should
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* consider moving this function there.
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*/
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void read_func_button(void)
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{
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int ret;
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u32 reg;
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/* Turn off SARADC to reset it. */
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writel(0, (SARADC_BASE + SARADC_CTRL));
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/* Enable channel 0 and power on SARADC. */
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writel(((0 & SARADC_INPUT_SRC_MSK) | SARADC_POWER_CTRL),
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(SARADC_BASE + SARADC_CTRL));
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/*
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* Wait for data to be ready. Use timeout of 20000us from
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* rockchip_saradc driver.
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*/
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ret = readl_poll_timeout((SARADC_BASE + SARADC_STAS), reg,
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!(reg & SARADC_ADC_STATUS), 20000);
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if (ret) {
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printf("ADC Timeout");
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return;
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}
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/* Read the data from the SARADC. */
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reg = readl((SARADC_BASE + SARADC_DATA));
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/* Turn the SARADC back off so it's ready to be used again. */
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writel(0, (SARADC_BASE + SARADC_CTRL));
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/*
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* If the value is less than 30 the button is being pressed.
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* Reset the device back into Rockchip download mode.
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*/
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if (reg <= 30) {
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printf("download key pressed, entering download mode...");
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writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
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do_reset(NULL, 0, 0, NULL);
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}
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};
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/*
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* Start LED very early so user knows device is on. Set color
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* to red.
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*/
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void spl_board_init(void)
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{
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read_func_button();
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/* Set GPIO0_C5, GPIO0_C6, and GPIO0_C7 to output. */
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writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) | \
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(GPIO_C7 | GPIO_C6 | GPIO_C5),
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(GPIO0_BASE + GPIO_SWPORT_DDR_H));
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/* Set GPIO0_C5 and GPIO_C6 to 0 and GPIO0_C7 to 1. */
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writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) | GPIO_C7,
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(GPIO0_BASE + GPIO_SWPORT_DR_H));
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}
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/*
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* Buzz the buzzer so the user knows something is going on. Make it
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* optional in case PWM is disabled.
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*/
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void __maybe_unused startup_buzz(void)
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{
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struct udevice *dev;
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int err;
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err = uclass_get_device(UCLASS_PWM, 0, &dev);
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if (err)
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printf("pwm not found\n");
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pwm_set_enable(dev, 0, 1);
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mdelay(200);
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pwm_set_enable(dev, 0, 0);
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}
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/*
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* Provide the bare minimum to identify the panel for the RG353
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* series. Since we don't have a working framebuffer device, no
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* need to init the panel; just identify it and provide the
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* clocks so we know what to set the different clock values to.
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*/
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static const struct display_timing rg353_default_timing = {
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.pixelclock.typ = 24150000,
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.hactive.typ = 640,
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.hfront_porch.typ = 40,
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.hback_porch.typ = 80,
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.hsync_len.typ = 2,
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.vactive.typ = 480,
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.vfront_porch.typ = 18,
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.vback_porch.typ = 28,
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.vsync_len.typ = 2,
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.flags = DISPLAY_FLAGS_HSYNC_HIGH |
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DISPLAY_FLAGS_VSYNC_HIGH,
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};
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static int anbernic_rg353_panel_get_timing(struct udevice *dev,
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struct display_timing *timings)
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{
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memcpy(timings, &rg353_default_timing, sizeof(*timings));
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return 0;
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}
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static int anbernic_rg353_panel_probe(struct udevice *dev)
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{
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struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
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plat->lanes = 4;
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plat->format = MIPI_DSI_FMT_RGB888;
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plat->mode_flags = MIPI_DSI_MODE_VIDEO |
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MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_EOT_PACKET |
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MIPI_DSI_MODE_LPM;
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return 0;
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}
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static const struct panel_ops anbernic_rg353_panel_ops = {
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.get_display_timing = anbernic_rg353_panel_get_timing,
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};
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U_BOOT_DRIVER(anbernic_rg353_panel) = {
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.name = "anbernic_rg353_panel",
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.id = UCLASS_PANEL,
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.ops = &anbernic_rg353_panel_ops,
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.probe = anbernic_rg353_panel_probe,
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.plat_auto = sizeof(struct mipi_dsi_panel_plat),
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};
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int rgxx3_detect_display(void)
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{
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struct udevice *dev;
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struct mipi_dsi_device *dsi;
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struct mipi_dsi_panel_plat *mplat;
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const struct rg353_panel *panel;
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int ret = 0;
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int i;
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u8 panel_id[2];
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/*
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* Take panel out of reset status.
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* Set GPIO4_A0 to output.
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*/
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writel(GPIO_WRITEMASK(GPIO_A0) | GPIO_A0,
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(GPIO4_BASE + GPIO_SWPORT_DDR_L));
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/* Set GPIO4_A0 to 1. */
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writel(GPIO_WRITEMASK(GPIO_A0) | GPIO_A0,
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(GPIO4_BASE + GPIO_SWPORT_DR_L));
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/* Probe the DSI controller. */
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ret = uclass_get_device_by_name(UCLASS_VIDEO_BRIDGE,
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"dsi@fe060000", &dev);
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if (ret) {
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printf("DSI host not probed: %d\n", ret);
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return ret;
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}
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/* Probe the DSI panel. */
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ret = device_bind_driver_to_node(dev, "anbernic_rg353_panel",
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"anbernic_rg353_panel",
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dev_ofnode(dev), NULL);
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if (ret) {
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printf("Failed to probe RG353 panel: %d\n", ret);
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return ret;
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}
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/*
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* Attach the DSI controller which will also probe and attach
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* the DSIDPHY.
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*/
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ret = video_bridge_attach(dev);
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if (ret) {
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printf("Failed to attach DSI controller: %d\n", ret);
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return ret;
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}
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/*
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* Get the panel which should have already been probed by the
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* video_bridge_attach() function.
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*/
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ret = uclass_first_device_err(UCLASS_PANEL, &dev);
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if (ret) {
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printf("Panel device error: %d\n", ret);
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return ret;
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}
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/* Now call the panel via DSI commands to get the panel ID. */
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mplat = dev_get_plat(dev);
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dsi = mplat->device;
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mipi_dsi_set_maximum_return_packet_size(dsi, sizeof(panel_id));
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ret = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_DISPLAY_ID, &panel_id,
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sizeof(panel_id));
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if (ret < 0) {
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printf("Unable to read panel ID: %d\n", ret);
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return ret;
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}
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/* Get the correct panel compatible from the table. */
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for (i = 0; i < ARRAY_SIZE(rg353_panel_details); i++) {
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if (rg353_panel_details[i].id == ((panel_id[0] << 8) |
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panel_id[1])) {
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panel = &rg353_panel_details[i];
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break;
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}
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}
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if (!panel) {
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printf("Unable to identify panel_id %x\n",
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(panel_id[0] << 8) | panel_id[1]);
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return -EINVAL;
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}
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env_set("panel", panel->panel_compat[0]);
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return 0;
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}
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/* Detect which Anbernic RGXX3 device we are using so as to load the
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* correct devicetree for Linux. Set an environment variable once
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* found. The detection depends on the value of ADC channel 1, the
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* presence of an eMMC on mmc0, and querying the DSI panel.
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*/
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int rgxx3_detect_device(void)
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{
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u32 adc_info;
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int ret, i;
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int board_id = -ENXIO;
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struct mmc *mmc;
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ret = adc_channel_single_shot("saradc@fe720000", 1, &adc_info);
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if (ret) {
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printf("Read SARADC failed with error %d\n", ret);
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return ret;
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}
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/*
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* Get the correct device from the table. The ADC value is
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* determined by a resistor on ADC channel 0. The hardware
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* design calls for no more than a 1% variance on the
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* resistor, so assume a +- value of 15 should be enough.
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*/
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for (i = 0; i < ARRAY_SIZE(rg3xx_model_details); i++) {
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u32 adc_min = rg3xx_model_details[i].adc_value - 15;
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u32 adc_max = rg3xx_model_details[i].adc_value + 15;
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if (adc_min < adc_info && adc_max > adc_info) {
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board_id = i;
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break;
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}
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}
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/*
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* Try to access the eMMC on an RG353V, RG353P, or RG Arc D.
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* If it's missing, it's an RG353VS, RG353PS, or RG Arc S.
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* Note we could also check for a touchscreen at 0x1a on i2c2.
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*/
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if (board_id == RG353V || board_id == RG353P || board_id == RGARCD) {
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mmc = find_mmc_device(0);
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if (mmc) {
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ret = mmc_init(mmc);
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if (ret) {
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if (board_id == RG353V)
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board_id = RG353VS;
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else if (board_id == RG353P)
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board_id = RG353PS;
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else
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board_id = RGARCS;
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}
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}
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}
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if (board_id < 0)
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return board_id;
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env_set("board", rg3xx_model_details[board_id].board);
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env_set("board_name",
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rg3xx_model_details[board_id].board_name);
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env_set("fdtfile", rg3xx_model_details[board_id].fdtfile);
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/* Skip panel detection for when it is not needed. */
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if (!rg3xx_model_details[board_id].detect_panel)
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return 0;
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/* Warn but don't fail for errors in auto-detection of the panel. */
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ret = rgxx3_detect_display();
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if (ret)
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printf("Failed to detect panel type\n");
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return 0;
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}
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int rk_board_late_init(void)
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{
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int ret;
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ret = rgxx3_detect_device();
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if (ret) {
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printf("Unable to detect device type: %d\n", ret);
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return ret;
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}
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/* Turn off red LED and turn on orange LED. */
|
|
writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) | GPIO_C6,
|
|
(GPIO0_BASE + GPIO_SWPORT_DR_H));
|
|
|
|
if (IS_ENABLED(CONFIG_DM_PWM))
|
|
startup_buzz();
|
|
|
|
return 0;
|
|
}
|
|
|
|
int ft_board_setup(void *blob, struct bd_info *bd)
|
|
{
|
|
const struct rg353_panel *panel = NULL;
|
|
int node, ret, i;
|
|
char *env;
|
|
|
|
/* No fixups necessary for the RG503 */
|
|
env = env_get("board_name");
|
|
if (env && (!strcmp(env, rg3xx_model_details[RG503].board_name)))
|
|
return 0;
|
|
|
|
/* Change the model name of the RG353M */
|
|
if (env && (!strcmp(env, rg3xx_model_details[RG353M].board_name)))
|
|
fdt_setprop(blob, 0, "model",
|
|
rg3xx_model_details[RG353M].board_name,
|
|
sizeof(rg3xx_model_details[RG353M].board_name));
|
|
|
|
env = env_get("panel");
|
|
if (!env) {
|
|
printf("Can't get panel env\n");
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Check if the environment variable doesn't equal the panel.
|
|
* If it doesn't, update the devicetree to the correct panel.
|
|
*/
|
|
node = fdt_path_offset(blob, "/dsi@fe060000/panel@0");
|
|
if (!(node > 0)) {
|
|
printf("Can't find the DSI node\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
ret = fdt_node_check_compatible(blob, node, env);
|
|
if (ret < 0)
|
|
return -ENODEV;
|
|
|
|
/* Panels match, return 0. */
|
|
if (!ret)
|
|
return 0;
|
|
|
|
/* Panels don't match, search by first compatible value. */
|
|
for (i = 0; i < ARRAY_SIZE(rg353_panel_details); i++) {
|
|
if (!strcmp(env, rg353_panel_details[i].panel_compat[0])) {
|
|
panel = &rg353_panel_details[i];
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!panel) {
|
|
printf("Unable to identify panel by compat string\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* Set the compatible with the auto-detected values */
|
|
fdt_setprop_string(blob, node, "compatible", panel->panel_compat[0]);
|
|
if (panel->panel_compat[1])
|
|
fdt_appendprop_string(blob, node, "compatible",
|
|
panel->panel_compat[1]);
|
|
|
|
return 0;
|
|
}
|