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8ed8517d9e
It's one thing to have the register mapped via a well-defined struct but it's another to be able to make use of it. For that to happen, one needs to cast the physical address memory of the beginning of the register address space with the struct. Since this cannot change, let's hardcode it in the include files so that users do not need to duplicate this line of code in their own implementation. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
107 lines
5.4 KiB
C
107 lines
5.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd.
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*/
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#ifndef _ASM_ARCH_IOC_RK3588_H
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#define _ASM_ARCH_IOC_RK3588_H
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#define BUS_IOC_BASE 0xfd5f8000
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struct rk3588_bus_ioc {
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unsigned int reserved0000[3]; /* Address Offset: 0x0000 */
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unsigned int gpio0b_iomux_sel_h; /* Address Offset: 0x000C */
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unsigned int gpio0c_iomux_sel_l; /* Address Offset: 0x0010 */
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unsigned int gpio0c_iomux_sel_h; /* Address Offset: 0x0014 */
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unsigned int gpio0d_iomux_sel_l; /* Address Offset: 0x0018 */
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unsigned int gpio0d_iomux_sel_h; /* Address Offset: 0x001C */
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unsigned int gpio1a_iomux_sel_l; /* Address Offset: 0x0020 */
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unsigned int gpio1a_iomux_sel_h; /* Address Offset: 0x0024 */
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unsigned int gpio1b_iomux_sel_l; /* Address Offset: 0x0028 */
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unsigned int gpio1b_iomux_sel_h; /* Address Offset: 0x002C */
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unsigned int gpio1c_iomux_sel_l; /* Address Offset: 0x0030 */
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unsigned int gpio1c_iomux_sel_h; /* Address Offset: 0x0034 */
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unsigned int gpio1d_iomux_sel_l; /* Address Offset: 0x0038 */
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unsigned int gpio1d_iomux_sel_h; /* Address Offset: 0x003C */
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unsigned int gpio2a_iomux_sel_l; /* Address Offset: 0x0040 */
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unsigned int gpio2a_iomux_sel_h; /* Address Offset: 0x0044 */
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unsigned int gpio2b_iomux_sel_l; /* Address Offset: 0x0048 */
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unsigned int gpio2b_iomux_sel_h; /* Address Offset: 0x004C */
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unsigned int gpio2c_iomux_sel_l; /* Address Offset: 0x0050 */
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unsigned int gpio2c_iomux_sel_h; /* Address Offset: 0x0054 */
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unsigned int gpio2d_iomux_sel_l; /* Address Offset: 0x0058 */
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unsigned int gpio2d_iomux_sel_h; /* Address Offset: 0x005C */
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unsigned int gpio3a_iomux_sel_l; /* Address Offset: 0x0060 */
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unsigned int gpio3a_iomux_sel_h; /* Address Offset: 0x0064 */
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unsigned int gpio3b_iomux_sel_l; /* Address Offset: 0x0068 */
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unsigned int gpio3b_iomux_sel_h; /* Address Offset: 0x006C */
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unsigned int gpio3c_iomux_sel_l; /* Address Offset: 0x0070 */
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unsigned int gpio3c_iomux_sel_h; /* Address Offset: 0x0074 */
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unsigned int gpio3d_iomux_sel_l; /* Address Offset: 0x0078 */
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unsigned int gpio3d_iomux_sel_h; /* Address Offset: 0x007C */
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unsigned int gpio4a_iomux_sel_l; /* Address Offset: 0x0080 */
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unsigned int gpio4a_iomux_sel_h; /* Address Offset: 0x0084 */
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unsigned int gpio4b_iomux_sel_l; /* Address Offset: 0x0088 */
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unsigned int gpio4b_iomux_sel_h; /* Address Offset: 0x008C */
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unsigned int gpio4c_iomux_sel_l; /* Address Offset: 0x0090 */
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unsigned int gpio4c_iomux_sel_h; /* Address Offset: 0x0094 */
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unsigned int gpio4d_iomux_sel_l; /* Address Offset: 0x0098 */
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unsigned int gpio4d_iomux_sel_h; /* Address Offset: 0x009C */
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};
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check_member(rk3588_bus_ioc, gpio4d_iomux_sel_h, 0x009C);
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#define PMU1_IOC_BASE 0xfd5f0000
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struct rk3588_pmu1_ioc {
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unsigned int gpio0a_iomux_sel_l; /* Address Offset: 0x0000 */
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unsigned int gpio0a_iomux_sel_h; /* Address Offset: 0x0004 */
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unsigned int gpio0b_iomux_sel_l; /* Address Offset: 0x0008 */
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unsigned int reserved0012; /* Address Offset: 0x000C */
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unsigned int gpio0a_ds_l; /* Address Offset: 0x0010 */
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unsigned int gpio0a_ds_h; /* Address Offset: 0x0014 */
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unsigned int gpio0b_ds_l; /* Address Offset: 0x0018 */
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unsigned int reserved0028; /* Address Offset: 0x001C */
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unsigned int gpio0a_p; /* Address Offset: 0x0020 */
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unsigned int gpio0b_p; /* Address Offset: 0x0024 */
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unsigned int gpio0a_ie; /* Address Offset: 0x0028 */
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unsigned int gpio0b_ie; /* Address Offset: 0x002C */
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unsigned int gpio0a_smt; /* Address Offset: 0x0030 */
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unsigned int gpio0b_smt; /* Address Offset: 0x0034 */
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unsigned int gpio0a_pdis; /* Address Offset: 0x0038 */
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unsigned int gpio0b_pdis; /* Address Offset: 0x003C */
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unsigned int xin_con; /* Address Offset: 0x0040 */
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};
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check_member(rk3588_pmu1_ioc, xin_con, 0x0040);
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#define PMU2_IOC_BASE 0xfd5f4000
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struct rk3588_pmu2_ioc {
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unsigned int gpio0b_iomux_sel_h; /* Address Offset: 0x0000 */
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unsigned int gpio0c_iomux_sel_l; /* Address Offset: 0x0004 */
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unsigned int gpio0c_iomux_sel_h; /* Address Offset: 0x0008 */
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unsigned int gpio0d_iomux_sel_l; /* Address Offset: 0x000C */
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unsigned int gpio0d_iomux_sel_h; /* Address Offset: 0x0010 */
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unsigned int gpio0b_ds_h; /* Address Offset: 0x0014 */
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unsigned int gpio0c_ds_l; /* Address Offset: 0x0018 */
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unsigned int gpio0c_ds_h; /* Address Offset: 0x001C */
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unsigned int gpio0d_ds_l; /* Address Offset: 0x0020 */
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unsigned int gpio0d_ds_h; /* Address Offset: 0x0024 */
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unsigned int gpio0b_p; /* Address Offset: 0x0028 */
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unsigned int gpio0c_p; /* Address Offset: 0x002C */
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unsigned int gpio0d_p; /* Address Offset: 0x0030 */
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unsigned int gpio0b_ie; /* Address Offset: 0x0034 */
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unsigned int gpio0c_ie; /* Address Offset: 0x0038 */
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unsigned int gpio0d_ie; /* Address Offset: 0x003C */
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unsigned int gpio0b_smt; /* Address Offset: 0x0040 */
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unsigned int gpio0c_smt; /* Address Offset: 0x0044 */
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unsigned int gpio0d_smt; /* Address Offset: 0x0048 */
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unsigned int gpio0b_pdis; /* Address Offset: 0x004C */
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unsigned int gpio0c_pdis; /* Address Offset: 0x0050 */
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unsigned int gpio0d_pdis; /* Address Offset: 0x0054 */
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};
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check_member(rk3588_pmu2_ioc, gpio0d_pdis, 0x0054);
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#endif
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