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5d710738bb
Rockchip SoCs can automatically switch between jtag and sdmmc based on the following rules: - all the SDMMC pins including SDMMC_DET set as SDMMC function in GRF, - force_jtag bit in GRF is 1, - SDMMC_DET is low (no card detected), Note that the BootROM may mux all SDMMC pins in their SDMMC function or not, depending on the boot medium that were tried. Because SDMMC_DET pin is not guaranteed to be used as an SD card card detect pin, it could be low at boot or even switch at runtime, which would enable the jtag function and render the SD card unusable. This is the case for RK3588 Jaguar for example which has an SD card connector without an SD card card detect signal and has SDMMC_DET connected to ground. Because enabling JTAG at runtime could be a security issue and also to make sure that we have a consistent behavior on all boards by default, let's disable this force_jtag feature. However, let's make it easy to reenable it for debugging purposes by hiding it behind a Kconfig symbol. Note that soc_con[0] is reserved. But considering that it's way more user-friendly to access soc_con1 from the TRM with soc_con[1] than soc_con[0], and that soc_con0 would actually be located at 4 bytes before soc_con1, let's just make soc_con0 part of the soc_con array. Cc: Quentin Schulz <foss+uboot@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
59 lines
1.8 KiB
C
59 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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*/
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#ifndef __SOC_ROCKCHIP_RK3588_GRF_H__
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#define __SOC_ROCKCHIP_RK3588_GRF_H__
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struct rk3588_pmu1grf {
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unsigned int soc_con[12];
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unsigned int reserved0[(0x0050 - 0x002c) / 4 - 1];
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unsigned int biu_con;
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unsigned int biu_sts;
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unsigned int reserved1[(0x0060 - 0x0054) / 4 - 1];
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unsigned int soc_sts;
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unsigned int reserved2[(0x0080 - 0x0060) / 4 - 1];
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unsigned int mem_con[4];
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unsigned int reserved3[(0x0200 - 0x008c) / 4 - 1];
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unsigned int os_reg[8];
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unsigned int reserved4[(0x0230 - 0x021c) / 4 - 1];
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unsigned int rst_sts;
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unsigned int rst_clr;
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unsigned int reserved5[(0x0380 - 0x0234) / 4 - 1];
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unsigned int sd_detect_con;
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unsigned int reserved6[(0x0390 - 0x0380) / 4 - 1];
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unsigned int sd_detect_sts;
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unsigned int reserved7[(0x03a0 - 0x0390) / 4 - 1];
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unsigned int sd_detect_clr;
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unsigned int reserved8[(0x03b0 - 0x03a0) / 4 - 1];
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unsigned int sd_detect_cnt;
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};
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check_member(rk3588_pmu1grf, sd_detect_cnt, 0x03b0);
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#define SYS_GRF_BASE 0xfd58c000
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struct rk3588_sysgrf {
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unsigned int wdt_con0;
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unsigned int reserved0[(0x0010 - 0x0000) / 4 - 1];
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unsigned int uart_con[2];
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unsigned int reserved1[(0x00c0 - 0x0014) / 4 - 1];
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unsigned int gic_con0;
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unsigned int reserved2[(0x0200 - 0x00c0) / 4 - 1];
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unsigned int memcfg_con[32];
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unsigned int reserved3[(0x0300 - 0x027c) / 4 - 1];
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/* soc_con0 is reserved */
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unsigned int soc_con[14];
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unsigned int reserved4[(0x0380 - 0x0334) / 4 - 1];
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unsigned int soc_status[4];
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unsigned int reserved5[(0x0500 - 0x038c) / 4 - 1];
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unsigned int otp_key08;
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unsigned int otp_key0d;
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unsigned int otp_key0e;
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unsigned int reserved6[(0x0600 - 0x0508) / 4 - 1];
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unsigned int chip_id;
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};
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check_member(rk3588_sysgrf, chip_id, 0x0600);
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#endif /*__SOC_ROCKCHIP_RK3588_GRF_H__ */
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