mirror of
https://github.com/u-boot/u-boot.git
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1bc4e8eb1d
USB gadget is not working fully as expected on RK3328, it uses a board_usb_init() function to initialize the DWC2 OTG port. The board_usb_init() function does not intgrate with the generic phy framework and as a result the USB phy is not properly configured before or after USB gadget use. Having both USB_DWC2 and DWC2_OTG enabled for the same board is also causing some issues. Trying to use rockusb or ums command after usb stop result in a freeze due to usb stop is putting the phy in a suspended state. => usb start => usb stop => ums 0 mmc 0 --> freeze due to usb phy is suspended <-- Fix this by only using one of USB_DWC2 (host) or DWC2_OTG (peripheral) depending on the most likely usage of the otg port and by migrating to use DM_USB_GADGET instead of a board_usb_init() function. The nanopi-r2 and orangepi-r1-plus variants share OTG and power using a Type-C connector, mark these boards dr_mode as peripheral, the most likely usage is for recovery and image download. The rock64 and roc-cc currently use dr_mode as host, remove the DWC2_OTG driver from these boards to ensure that the USB_DWC2 driver is used. The rock-pi-e board does not enable the usb20_otg node so both USB_DWC2 and DWC2_OTG is removed from this board. Enable RockUSB and UMS on all boards with a otg port in peripheral mode. Also with the migration to DM_USB_GADGET completed the U-Boot specific change to reorder usb nodes in the soc device tree can be reverted. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
142 lines
1.7 KiB
Text
142 lines
1.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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spi0 = &spi0;
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};
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
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};
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dmc: dmc {
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bootph-all;
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compatible = "rockchip,rk3328-dmc";
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reg = <0x0 0xff400000 0x0 0x1000
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0x0 0xff780000 0x0 0x3000
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0x0 0xff100000 0x0 0x1000
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0x0 0xff440000 0x0 0x1000
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0x0 0xff720000 0x0 0x1000
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0x0 0xff798000 0x0 0x1000>;
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};
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};
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&cru {
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bootph-all;
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};
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&emmc {
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bootph-pre-ram;
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bootph-some-ram;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&emmc_bus8 {
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bootph-pre-ram;
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};
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&emmc_clk {
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bootph-pre-ram;
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};
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&emmc_cmd {
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bootph-pre-ram;
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};
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&gpio0 {
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bootph-pre-ram;
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};
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&grf {
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bootph-all;
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};
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&pcfg_pull_none {
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bootph-all;
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};
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&pcfg_pull_none_8ma {
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bootph-pre-ram;
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};
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&pcfg_pull_none_12ma {
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bootph-pre-ram;
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};
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&pcfg_pull_up {
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bootph-all;
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};
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&pcfg_pull_up_4ma {
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bootph-pre-ram;
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};
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&pcfg_pull_up_8ma {
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bootph-pre-ram;
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};
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&pcfg_pull_up_12ma {
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bootph-pre-ram;
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};
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&pinctrl {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc {
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bootph-pre-ram;
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bootph-some-ram;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&sdmmc0_bus4 {
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bootph-pre-ram;
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};
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&sdmmc0_clk {
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bootph-pre-ram;
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};
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&sdmmc0_cmd {
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bootph-pre-ram;
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};
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&sdmmc0_dectn {
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bootph-pre-ram;
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};
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&sdmmc0m1_pin {
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bootph-pre-ram;
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};
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&uart2 {
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bootph-all;
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clock-frequency = <24000000>;
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};
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&uart2m1_xfer {
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bootph-all;
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};
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#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
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&binman {
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simple-bin-spi {
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mkimage {
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args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
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offset = <0x8000>;
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};
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};
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};
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#endif
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