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1db4c0ac77
This adds TCPM framework in preparation for fusb302 support, which can handle USB power delivery messages. This is needed to solve issues with devices, that are running from a USB-C port supporting USB-PD, but not having a battery. Such a device currently boots to the kernel without interacting with the power-supply at all. If there are no USB-PD message replies within 5 seconds, the power-supply assumes the peripheral is not capable of USB-PD. It usually takes more than 5 seconds for the system to reach the kernel and probe the I2C based fusb302 chip driver. Thus the system always runs into this state. The power-supply's solution to fix this error state is a hard reset, which involves removing the power from VBUS. Boards without a battery (or huge capacitors) will reset at this point resulting in a boot loop. This imports the TCPM framework from the kernel. The porting has originally been done by Rockchip using hardware timers and the Linux kernel's TCPM code from some years ago. I had a look at upgrading to the latest TCPM kernel code, but that beast became a lot more complex due to adding more USB-C features. I believe these features are not needed in U-Boot and with multiple kthreads and hrtimers being involved it is non-trivial to port them. Instead I worked on stripping down features from the Rockchip port to an even more basic level. Also the TCPM code has been reworked to avoid complete use of any timers (Rockchip used SoC specific hardware timers + IRQ to implement delayed work mechanism). Instead the delayed state changes are handled directly from the poll loop. Note, that (in contrast to the original Rockchip port) the state machine has the same hard reset quirk, that the kernel has - i.e. it avoids disabling the CC pin resistors for devices that are not self-powered. Without that quirk, the Radxa Rock 5B will not just end up doing a machine reset when a hard reset is triggered, but will not even recover, because the CPU will loose power and the FUSB302 will keep this state because of leak voltage arriving through the RX serial pin (assuming a serial adapter is connected). This also includes a 'tcpm' command, which can be used to get information about the current state and the negotiated voltage and current. Co-developed-by: Wang Jie <dave.wang@rock-chips.com> Signed-off-by: Wang Jie <dave.wang@rock-chips.com> Tested-by: Soeren Moch <smoch@web.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
165 lines
6.6 KiB
C
165 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2013 Google, Inc
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*
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* (C) Copyright 2012
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* Pavel Herrmann <morpheus.ibis@gmail.com>
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*
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* Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
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*
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* Authors:
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* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
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*/
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#ifndef _DM_UCLASS_ID_H
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#define _DM_UCLASS_ID_H
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/* TODO(sjg@chromium.org): this could be compile-time generated */
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enum uclass_id {
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/* These are used internally by driver model */
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UCLASS_ROOT = 0,
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UCLASS_DEMO,
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UCLASS_TEST,
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UCLASS_TEST_FDT,
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UCLASS_TEST_FDT_MANUAL,
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UCLASS_TEST_BUS,
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UCLASS_TEST_PROBE,
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UCLASS_TEST_DUMMY,
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UCLASS_TEST_DEVRES,
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UCLASS_TEST_ACPI,
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UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
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UCLASS_I2C_EMUL, /* sandbox I2C device emulator */
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UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */
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UCLASS_PCI_EMUL, /* sandbox PCI device emulator */
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UCLASS_PCI_EMUL_PARENT, /* parent for PCI device emulators */
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UCLASS_USB_EMUL, /* sandbox USB bus device emulator */
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UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */
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/* U-Boot uclasses start here - in alphabetical order */
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UCLASS_ACPI_PMC, /* (x86) Power-management controller (PMC) */
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UCLASS_ADC, /* Analog-to-digital converter */
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UCLASS_AHCI, /* SATA disk controller */
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UCLASS_AUDIO_CODEC, /* Audio codec with control and data path */
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UCLASS_AXI, /* AXI bus */
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UCLASS_BLK, /* Block device */
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UCLASS_BLKMAP, /* Composable virtual block device */
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UCLASS_BOOTCOUNT, /* Bootcount backing store */
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UCLASS_BOOTDEV, /* Boot device for locating an OS to boot */
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UCLASS_BOOTMETH, /* Bootmethod for booting an OS */
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UCLASS_BOOTSTD, /* Standard boot driver */
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UCLASS_BUTTON, /* Button */
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UCLASS_CACHE, /* Cache controller */
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UCLASS_CLK, /* Clock source, e.g. used by peripherals */
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UCLASS_CPU, /* CPU, typically part of an SoC */
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UCLASS_CROS_EC, /* Chrome OS EC */
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UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
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UCLASS_DMA, /* Direct Memory Access */
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UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */
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UCLASS_DSI_HOST, /* Display Serial Interface host */
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UCLASS_ECDSA, /* Elliptic curve cryptographic device */
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UCLASS_EFI_LOADER, /* Devices created by UEFI applications */
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UCLASS_EFI_MEDIA, /* Devices provided by UEFI firmware */
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UCLASS_ETH, /* Ethernet device */
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UCLASS_ETH_PHY, /* Ethernet PHY device */
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UCLASS_EXTCON, /* External Connector Class */
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UCLASS_FFA, /* Arm Firmware Framework for Armv8-A */
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UCLASS_FFA_EMUL, /* sandbox FF-A device emulator */
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UCLASS_FIRMWARE, /* Firmware */
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UCLASS_FPGA, /* FPGA device */
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UCLASS_FUZZING_ENGINE, /* Fuzzing engine */
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UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
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UCLASS_FWU_MDATA, /* FWU Metadata Access */
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UCLASS_GPIO, /* Bank of general-purpose I/O pins */
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UCLASS_HASH, /* Hash device */
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UCLASS_HWSPINLOCK, /* Hardware semaphores */
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UCLASS_HOST, /* Sandbox host device */
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UCLASS_I2C, /* I2C bus */
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UCLASS_I2C_EEPROM, /* I2C EEPROM device */
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UCLASS_I2C_GENERIC, /* Generic I2C device */
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UCLASS_I2C_MUX, /* I2C multiplexer */
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UCLASS_I2S, /* I2S bus */
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UCLASS_IDE, /* IDE device */
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UCLASS_IOMMU, /* IOMMU */
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UCLASS_IRQ, /* Interrupt controller */
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UCLASS_KEYBOARD, /* Keyboard input device */
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UCLASS_LED, /* Light-emitting diode (LED) */
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UCLASS_LPC, /* x86 'low pin count' interface */
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UCLASS_MAILBOX, /* Mailbox controller */
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UCLASS_MASS_STORAGE, /* Mass storage device */
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UCLASS_MDIO, /* MDIO bus */
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UCLASS_MDIO_MUX, /* MDIO MUX/switch */
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UCLASS_MEMORY, /* Memory Controller device */
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UCLASS_SM, /* Secure Monitor driver */
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UCLASS_MISC, /* Miscellaneous device */
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UCLASS_MMC, /* SD / MMC card or chip */
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UCLASS_MOD_EXP, /* RSA Mod Exp device */
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UCLASS_MTD, /* Memory Technology Device (MTD) device */
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UCLASS_MUX, /* Multiplexer device */
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UCLASS_NOP, /* No-op devices */
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UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */
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UCLASS_NVME, /* NVM Express device */
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UCLASS_NVMXIP, /* NVM XIP devices */
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UCLASS_P2SB, /* (x86) Primary-to-Sideband Bus */
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UCLASS_PANEL, /* Display panel, such as an LCD */
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UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
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UCLASS_PARTITION, /* Logical disk partition device */
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UCLASS_PCH, /* x86 platform controller hub */
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UCLASS_PCI, /* PCI bus */
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UCLASS_PCI_EP, /* PCI endpoint device */
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UCLASS_PCI_GENERIC, /* Generic PCI bus device */
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UCLASS_PHY, /* Physical Layer (PHY) device */
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UCLASS_PINCONFIG, /* Pin configuration node device */
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UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
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UCLASS_PMIC, /* PMIC I/O device */
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UCLASS_POWER_DOMAIN, /* (SoC) Power domains */
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UCLASS_PVBLOCK, /* Xen virtual block device */
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UCLASS_PWM, /* Pulse-width modulator */
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UCLASS_PWRSEQ, /* Power sequence device */
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UCLASS_QFW, /* QEMU firmware config device */
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UCLASS_RAM, /* RAM controller */
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UCLASS_REBOOT_MODE, /* Reboot mode */
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UCLASS_REGULATOR, /* Regulator device */
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UCLASS_REMOTEPROC, /* Remote Processor device */
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UCLASS_RESET, /* Reset controller device */
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UCLASS_RKMTD, /* Rockchip MTD device */
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UCLASS_RNG, /* Random Number Generator */
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UCLASS_RTC, /* Real time clock device */
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UCLASS_SCMI_AGENT, /* Interface with an SCMI server */
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UCLASS_SCMI_BASE, /* Interface for SCMI Base protocol */
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UCLASS_SCSI, /* SCSI device */
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UCLASS_SERIAL, /* Serial UART */
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UCLASS_SIMPLE_BUS, /* Bus with child devices */
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UCLASS_SMEM, /* Shared memory interface */
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UCLASS_SOC, /* SOC Device */
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UCLASS_SOUND, /* Playing simple sounds */
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UCLASS_SPI, /* SPI bus */
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UCLASS_SPI_FLASH, /* SPI flash */
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UCLASS_SPI_GENERIC, /* Generic SPI flash target */
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UCLASS_SPMI, /* System Power Management Interface bus */
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UCLASS_SYSCON, /* System configuration device */
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UCLASS_SYSINFO, /* Device information from hardware */
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UCLASS_SYSRESET, /* System reset device */
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UCLASS_TCPM, /* TypeC port manager */
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UCLASS_TEE, /* Trusted Execution Environment device */
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UCLASS_THERMAL, /* Thermal sensor */
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UCLASS_TIMER, /* Timer device */
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UCLASS_TPM, /* Trusted Platform Module TIS interface */
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UCLASS_UFS, /* Universal Flash Storage */
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UCLASS_USB, /* USB bus */
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UCLASS_USB_DEV_GENERIC, /* USB generic device */
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UCLASS_USB_HUB, /* USB hub */
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UCLASS_USB_GADGET_GENERIC, /* USB generic device */
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UCLASS_VIDEO, /* Video or LCD device */
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UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */
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UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */
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UCLASS_VIDEO_OSD, /* On-screen display */
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UCLASS_VIRTIO, /* VirtIO transport device */
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UCLASS_W1, /* Dallas 1-Wire bus */
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UCLASS_W1_EEPROM, /* one-wire EEPROMs */
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UCLASS_WDT, /* Watchdog Timer driver */
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UCLASS_COUNT,
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UCLASS_INVALID = -1,
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};
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#endif
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