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d6a53f523a
At present there is a hex value SPL_STACK which both determines whether SPL has its own initial stack and the hex value of that stack. Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending on that and only providing the latter. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Resync defconfig files]
48 lines
1.3 KiB
Text
48 lines
1.3 KiB
Text
CONFIG_RISCV=y
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CONFIG_SYS_MALLOC_LEN=0xe00000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81200000
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CONFIG_ENV_SIZE=0x20000
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CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32"
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CONFIG_SPL_STACK=0x80200000
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CONFIG_SPL_BSS_START_ADDR=0x84000000
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CONFIG_SPL_BSS_MAX_SIZE=0x80000
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CONFIG_SYS_LOAD_ADDR=0x80200000
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CONFIG_SPL_SIZE_LIMIT=0x40000
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CONFIG_SPL=y
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CONFIG_DEBUG_UART_BASE=0x40600000
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CONFIG_DEBUG_UART_CLOCK=1000000
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CONFIG_SYS_CLK_FREQ=100000000
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CONFIG_BOOT_SCRIPT_OFFSET=0x0
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CONFIG_TARGET_XILINX_MBV=y
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CONFIG_SPL_OPENSBI_LOAD_ADDR=0x80100000
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CONFIG_RISCV_SMODE=y
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# CONFIG_SPL_SMP is not set
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CONFIG_REMAKE_ELF=y
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CONFIG_FIT=y
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CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_DISPLAY_CPUINFO=y
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CONFIG_DISPLAY_BOARDINFO=y
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# CONFIG_BOARD_LATE_INIT is not set
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CONFIG_SPL_MAX_SIZE=0x40000
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_HAVE_INIT_STACK=y
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CONFIG_SPL_SYS_MALLOC=y
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CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
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CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x2
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# CONFIG_CMD_MII is not set
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CONFIG_CMD_TIMER=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_DM_MTD=y
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CONFIG_DEBUG_UART_UARTLITE=y
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CONFIG_DEBUG_UART_ANNOUNCE=y
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CONFIG_DEBUG_UART_SKIP_INIT=y
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CONFIG_XILINX_UARTLITE=y
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# CONFIG_RISCV_TIMER is not set
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CONFIG_XILINX_TIMER=y
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# CONFIG_BINMAN_FDT is not set
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CONFIG_PANIC_HANG=y
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CONFIG_SPL_GZIP=y
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