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https://github.com/u-boot/u-boot.git
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0a17123ded
If TPL_GPIO and TPL_PINCTRL_ROCKCHIP are enabled and a sysreset-gpio is provided in the TPL Device Tree, this will trigger a system reset similar to what's currently been done in SPL whenever the RK3399 "warm" boots. Because there's currently only one user of sysreset-gpio logic, and TPL is enabled on that board, so let's migrate the logic and that board to do it in TPL. There are three reasons for moving this earlier: - faster boot time as we don't need to reach SPL to be able to reset the system on a condition we know is already met in TPL, - have less code to be impacted by the issue this system reset works around (that is, "unclean" SoC registers after a reboot), - less confusion around the reason for restarting. Indeed when done from SPL, the following log can be observed: """ U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45) Channel 0: DDR3, 666MHz BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB Channel 1: DDR3, 666MHz BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB 256B stride Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45 +0100) Trying to boot from MMC2 U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45) """ possibly hinting at an issue within the SPL when loading the fitImage from MMC2 instead of the normal course of events (a system reset). Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
108 lines
2.7 KiB
Text
108 lines
2.7 KiB
Text
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_ENV_SIZE=0x3000
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CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-puma-haikou"
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CONFIG_DM_RESET=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
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CONFIG_ROCKCHIP_SPI_IMAGE=y
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CONFIG_TARGET_PUMA_RK3399=y
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CONFIG_SYS_LOAD_ADDR=0x800800
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CONFIG_SF_DEFAULT_BUS=1
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CONFIG_DEBUG_UART_BASE=0xFF180000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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CONFIG_DEBUG_UART=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
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CONFIG_CONSOLE_MUX=y
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_MAX_SIZE=0x2e000
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CONFIG_SPL_PAD_TO=0x38000
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
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CONFIG_SPL_I2C=y
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CONFIG_SPL_POWER=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_TPL=y
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CONFIG_TPL_GPIO=y
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# CONFIG_BOOTM_NETBSD is not set
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# CONFIG_BOOTM_PLAN9 is not set
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# CONFIG_BOOTM_RTEMS is not set
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# CONFIG_CMD_VBE is not set
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# CONFIG_BOOTM_VXWORKS is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_EROFS=y
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CONFIG_CMD_SQUASHFS=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_ENV_SPI_MAX_HZ=50000000
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_DEV=1
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_BUTTON=y
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CONFIG_BUTTON_GPIO=y
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CONFIG_GPIO_HOG=y
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CONFIG_SPL_GPIO_HOG=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_ROCKCHIP_IODOMAIN=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_SPI_FLASH_GIGADEVICE=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHY_ANEG_TIMEOUT=30000
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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CONFIG_PHY_ROCKCHIP_TYPEC=y
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CONFIG_TPL_PINCTRL=y
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CONFIG_TPL_PINCTRL_FULL=y
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CONFIG_DM_PMIC_FAN53555=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_SPL_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_DM_RTC=y
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CONFIG_RTC_ISL1208=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550_MEM32=y
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CONFIG_ROCKCHIP_SPI=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_ASIX88179=y
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CONFIG_USB_ETHER_MCS7830=y
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CONFIG_USB_ETHER_RTL8152=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_ERRNO_STR=y
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