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2f3b679298
Add the necessary DSDT files copied from tianocore to boot the RPi4. In addition generate a board specific SSDT to dynamically enable/disable ACPI devices based on FDT. This is required to support the various variants and boot options. It also allows to test the code on QEMU 9.0 without modifications, since it doesn't emulate PCIe yet. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Matthias Brugger <mbrugger@suse.com> Cc: Peter Robinson <pbrobinson@gmail.com>
195 lines
11 KiB
Text
195 lines
11 KiB
Text
/** @file
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*
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* [DSDT] RHProxy device to enable WinRT API (RHPX)
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*
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* Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
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* Copyright (c) Microsoft Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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Device (RHPX)
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{
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Name (_HID, "MSFT8000")
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Name (_CID, "MSFT8000")
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Name (_UID, 1)
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Name(_CRS, ResourceTemplate ()
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{
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// Index 0
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SPISerialBus ( // SCKL - GPIO 11 - Pin 23
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// MOSI - GPIO 10 - Pin 19
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// MISO - GPIO 9 - Pin 21
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// CE0 - GPIO 8 - Pin 24
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0, // Device selection (CE0)
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PolarityLow, // Device selection polarity
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FourWireMode, // WireMode
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8, // DataBit len
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ControllerInitiated, // Slave mode
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4000000, // Connection speed
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ClockPolarityLow, // Clock polarity
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ClockPhaseFirst, // Clock phase
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"\\_SB.GDV0.SPI0", // ResourceSource: SPI bus controller name
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0, // ResourceSourceIndex
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// Resource usage
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// DescriptorName: creates name for offset of resource descriptor
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) // Vendor Data
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// Index 1
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SPISerialBus ( // SCKL - GPIO 11 - Pin 23
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// MOSI - GPIO 10 - Pin 19
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// MISO - GPIO 9 - Pin 21
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// CE1 - GPIO 7 - Pin 26
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1, // Device selection (CE1)
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PolarityLow, // Device selection polarity
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FourWireMode, // WireMode
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8, // DataBit len
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ControllerInitiated, // Slave mode
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4000000, // Connection speed
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ClockPolarityLow, // Clock polarity
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ClockPhaseFirst, // Clock phase
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"\\_SB.GDV0.SPI0", // ResourceSource: SPI bus controller name
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0, // ResourceSourceIndex
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// Resource usage
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// DescriptorName: creates name for offset of resource descriptor
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) // Vendor Data
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// Index 2
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I2CSerialBus ( // Pin 3 (GPIO2, SDA1), 5 (GPIO3, SCL1)
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0xFFFF, // SlaveAddress: placeholder
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, // SlaveMode: default to ControllerInitiated
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0, // ConnectionSpeed: placeholder
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, // Addressing Mode: default to 7 bit
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"\\_SB.GDV0.I2C1", // ResourceSource: I2C bus controller name
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,
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,
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, // Descriptor Name: creates name for offset of resource descriptor
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) // Vendor Data
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// Index 3
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SPISerialBus ( // SPI1_SCLK - GPIO21
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// SPI1_MOSI - GPIO20
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// SPI1_MISO - GPIO19
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// SPI1_CE2_N - GPIO16
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2, // Device selection (CE2)
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PolarityLow, // Device selection polarity
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FourWireMode, // WireMode
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8, // DataBit len
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ControllerInitiated, // Slave mode
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4000000, // Connection speed
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ClockPolarityLow, // Clock polarity
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ClockPhaseFirst, // Clock phase
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"\\_SB.GDV0.SPI1", // ResourceSource: SPI bus controller name
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0, // ResourceSourceIndex
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// Resource usage
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// DescriptorName: creates name for offset of resource descriptor
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) // Vendor Data
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// GPIO 2
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GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 2 }
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GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 2 }
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// GPIO 3
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GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 3 }
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GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 3 }
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// GPIO 4
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GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 4 }
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GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 4 }
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// GPIO 5
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GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 5 }
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GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 5 }
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// GPIO 6
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GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 6 }
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GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 6 }
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// GPIO 7
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GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 7 }
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GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 7 }
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// GPIO 8
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GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 8 }
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GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 8 }
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// GPIO 9
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 9 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 9 }
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// GPIO 10
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 10 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 10 }
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// GPIO 11
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 11 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 11 }
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// GPIO 12
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 12 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 12 }
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// GPIO 13
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 13 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 13 }
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// NTRAID#MSFT-7141401-2016/04/7-jordanrh - disable UART muxing
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// until a proper solution can be created for the dmap conflict
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// GPIO 14 - UART TX
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// GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 14 }
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// GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 14 }
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// GPIO 15 - UART RX
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// GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 15 }
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// GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 15 }
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// GPIO 16
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 16 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 16 }
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// GPIO 17
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 17 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 17 }
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// GPIO 18
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 18 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 18 }
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// GPIO 19
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 19 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 19 }
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// GPIO 20
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 20 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 20 }
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// GPIO 21
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 21 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 21 }
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// GPIO 22
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 22 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 22 }
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// GPIO 23
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 23 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 23 }
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// GPIO 24
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 24 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 24 }
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// GPIO 25
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 25 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 25 }
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// GPIO 26
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 26 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 26 }
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// GPIO 27
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GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 27 }
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GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 27 }
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})
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Name (_DSD, Package()
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{
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ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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Package ()
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{
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// Reference http://www.raspberrypi.org/documentation/hardware/raspberrypi/spi/README.md
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// SPI 0
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Package (2) { "bus-SPI-SPI0", Package() { 0, 1 } }, // Index 0 & 1
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Package (2) { "SPI0-MinClockInHz", 7629 }, // 7629 Hz
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Package (2) { "SPI0-MaxClockInHz", 125000000 }, // 125 MHz
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Package (2) { "SPI0-SupportedDataBitLengths", Package() { 8 } }, // Data Bit Length
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// I2C1
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Package (2) { "bus-I2C-I2C1", Package() { 2 } },
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// GPIO Pin Count and supported drive modes
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Package (2) { "GPIO-PinCount", 54 },
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Package (2) { "GPIO-UseDescriptorPinNumbers", 1 },
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Package (2) { "GPIO-SupportedDriveModes", 0xf }, // InputHighImpedance, InputPullUp, InputPullDown, OutputCmos
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// SPI 1
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Package (2) { "bus-SPI-SPI1", Package() { 3 }}, // Index 3
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Package (2) { "SPI1-MinClockInHz", 30511 }, // 30.5 kHz
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Package (2) { "SPI1-MaxClockInHz", 20000000 }, // 20 MHz
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Package (2) { "SPI1-SupportedDataBitLengths", Package() { 8 } }, // Data Bit Length
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}
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})
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}
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