u-boot/arch/arm/mach-sunxi
Andre Przywara 6d6d58be25 sunxi: update rmr_switch.S source code
Because the Allwinner BootROM always runs in AArch32, even on ARMv8 SoCs,
we need to switch to AArch64 first, but also need to save the CPU state,
when we later may need to return to the BootROM, for continuing with the
FEL USB protocol. This is done in 32-bit code, which we include into the
AArch64 boot assembly file as a series of .word directives, containing
the encoded AArch32 instructions. To be able to change and verify that
code, we also kept an assembly file with the respective 32-bit code, but
just for reference.

As this code is never compiled or assembled - it's just for
documentation - it became stale over time: we didn't really update this
along with the changes we made to the boot code. In particular the FEL
save code was completely missing.

Update that 32-bit assembly file, to match the current version used in
boot0.h, including the FEL save routine. Also update the build
instructions in the comments, to give people an actual chance to
assemble this code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2025-03-27 00:26:35 +00:00
..
dram_timings sunxi: H616: dram: LPDDR4: adjust settings 2024-10-10 00:23:41 +01:00
board.c arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:47 -06:00
clock.c sunxi: compile clock.c for SPL only 2024-04-22 01:12:25 +01:00
clock_sun4i.c arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:47 -06:00
clock_sun6i.c arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:47 -06:00
clock_sun8i_a83t.c arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:47 -06:00
clock_sun9i.c arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:47 -06:00
clock_sun50i_h6.c sunxi: sun50i_h6: clock: fix PLL_PERIPH0 rate calculation 2025-03-27 00:26:35 +00:00
cpu_info.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00
dram_helpers.c sunxi: restore modified memory 2024-03-05 01:16:56 +00:00
dram_sun4i.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00
dram_sun6i.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00
dram_sun8i_a23.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00
dram_sun8i_a33.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00
dram_sun8i_a83t.c arm: mach: sunxi: Remove duplicate newlines 2024-07-15 12:12:17 -06:00
dram_sun9i.c arm: mach: sunxi: Remove duplicate newlines 2024-07-15 12:12:17 -06:00
dram_sun50i_h6.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00
dram_sun50i_h616.c sunxi: H616: dram: Improve address wrapping detection 2025-03-27 00:26:35 +00:00
dram_suniv.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00
dram_sunxi_dw.c arm: mach: sunxi: Remove duplicate newlines 2024-07-15 12:12:17 -06:00
gtbus_sun9i.c arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:47 -06:00
Kconfig clk: sunxi: Add support for the A100/A133 CCU 2025-03-27 00:26:35 +00:00
Makefile arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11 11:44:47 -06:00
pmic_bus.c sunxi: pmic_bus: Move SPL I2C addresses into Kconfig 2025-03-27 00:26:35 +00:00
prcm.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00
rmr_switch.S sunxi: update rmr_switch.S source code 2025-03-27 00:26:35 +00:00
spl_spi_sunxi.c spl: Create a function to init spl_load_info 2024-08-23 15:58:42 -06:00
timer.c sunxi: remove common.h inclusion 2024-01-29 01:18:52 +00:00