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b833de8d42
Agilex5 supports both HPS handoff data and DDR handoff data. Existing HPS handoff functions are restructured to support both existing devices and Agilex5 device. Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
144 lines
3.4 KiB
C
144 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020-2021 Intel Corporation <www.intel.com>
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* Copyright (C) 2025 Altera Corporation <www.altera.com>
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*
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*/
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#include <errno.h>
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#include <asm/arch/handoff_soc64.h>
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#include <asm/io.h>
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#include "log.h"
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#ifndef __ASSEMBLY__
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#include <asm/types.h>
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enum endianness {
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LITTLE_ENDIAN = 0,
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BIG_ENDIAN,
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UNKNOWN_ENDIANNESS
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};
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#endif
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static enum endianness check_endianness(u32 handoff)
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{
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switch (handoff) {
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case SOC64_HANDOFF_MAGIC_BOOT:
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case SOC64_HANDOFF_MAGIC_MUX:
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case SOC64_HANDOFF_MAGIC_IOCTL:
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case SOC64_HANDOFF_MAGIC_FPGA:
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case SOC64_HANDOFF_MAGIC_DELAY:
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case SOC64_HANDOFF_MAGIC_CLOCK:
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case SOC64_HANDOFF_MAGIC_SDRAM:
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#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
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case SOC64_HANDOFF_MAGIC_PERI:
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#else
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case SOC64_HANDOFF_MAGIC_MISC:
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#endif
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return BIG_ENDIAN;
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#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
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case SOC64_HANDOFF_DDR_UMCTL2_MAGIC:
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debug("%s: umctl2 handoff data\n", __func__);
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return LITTLE_ENDIAN;
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case SOC64_HANDOFF_DDR_PHY_MAGIC:
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debug("%s: PHY handoff data\n", __func__);
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return LITTLE_ENDIAN;
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case SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC:
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debug("%s: PHY engine handoff data\n", __func__);
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return LITTLE_ENDIAN;
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#endif
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default:
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debug("%s: Unknown endianness!!\n", __func__);
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return UNKNOWN_ENDIANNESS;
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}
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}
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static int getting_endianness(void *handoff_address, enum endianness *endian_t)
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{
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/* Checking handoff data is little endian ? */
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*endian_t = check_endianness(readl(handoff_address));
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if (*endian_t == UNKNOWN_ENDIANNESS) {
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/* Trying to check handoff data is big endian? */
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*endian_t = check_endianness(swab32(readl(handoff_address)));
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if (*endian_t == UNKNOWN_ENDIANNESS) {
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debug("%s: Cannot find HANDOFF MAGIC ", __func__);
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debug("at addr 0x%p\n", (u32 *)handoff_address);
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return -EPERM;
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}
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}
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return 0;
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}
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int socfpga_get_handoff_size(void *handoff_address)
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{
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u32 size;
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int ret;
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enum endianness endian_t;
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ret = getting_endianness(handoff_address, &endian_t);
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if (ret)
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return ret;
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size = readl(handoff_address + SOC64_HANDOFF_OFFSET_LENGTH);
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if (endian_t == BIG_ENDIAN)
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size = swab32(size);
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size = (size - SOC64_HANDOFF_OFFSET_DATA) / sizeof(u32);
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debug("%s: handoff address = 0x%p handoff size = 0x%08x\n", __func__,
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(u32 *)handoff_address, size);
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return size;
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}
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int socfpga_handoff_read(void *handoff_address, void *table, u32 table_len)
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{
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u32 temp;
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u32 *table_x32 = table;
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u32 i = 0;
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int ret;
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enum endianness endian_t;
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ret = getting_endianness(handoff_address, &endian_t);
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if (ret)
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return ret;
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temp = readl(handoff_address + SOC64_HANDOFF_OFFSET_DATA +
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(i * sizeof(u32)));
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if (endian_t == BIG_ENDIAN) {
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debug("%s: Handoff addr = 0x%p ", __func__, (u32 *)handoff_address);
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debug("Handoff table address = 0x%p ", table_x32);
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debug("table length = 0x%x\n", table_len);
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debug("%s: handoff data =\n{\n", __func__);
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*table_x32 = swab32(temp);
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} else if (endian_t == LITTLE_ENDIAN) {
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debug(" {\n");
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*table_x32 = temp;
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}
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debug(" No.%d Addr 0x%08x: ", i, *table_x32);
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for (i = 1; i < table_len; i++) {
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table_x32++;
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temp = readl(handoff_address +
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SOC64_HANDOFF_OFFSET_DATA +
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(i * sizeof(u32)));
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if (endian_t == BIG_ENDIAN)
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*table_x32 = swab32(temp);
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else if (endian_t == LITTLE_ENDIAN)
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*table_x32 = temp;
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if (!(i % 2))
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debug(" No.%d Addr 0x%08x: ", i,
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*table_x32);
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else
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debug(" 0x%08x\n", *table_x32);
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}
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debug("\n}\n");
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return 0;
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}
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