/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2016 Socionext Inc. * Author: Masahiro Yamada */ #ifndef SDHCI_CADENCE_H_ #define SDHCI_CADENCE_H_ /* HRS - Host Register Set (specific to Cadence) */ /* PHY access port */ #define SDHCI_CDNS_HRS04 0x10 /* Cadence V4 HRS04 Description*/ #define SDHCI_CDNS_HRS04_ACK BIT(26) #define SDHCI_CDNS_HRS04_RD BIT(25) #define SDHCI_CDNS_HRS04_WR BIT(24) #define SDHCI_CDNS_HRS04_RDATA GENMASK(23, 16) #define SDHCI_CDNS_HRS04_WDATA GENMASK(15, 8) #define SDHCI_CDNS_HRS04_ADDR GENMASK(5, 0) #define SDHCI_CDNS_HRS05 0x14 /* eMMC control */ #define SDHCI_CDNS_HRS06 0x18 #define SDHCI_CDNS_HRS06_TUNE_UP BIT(15) #define SDHCI_CDNS_HRS06_TUNE GENMASK(13, 8) #define SDHCI_CDNS_HRS06_MODE GENMASK(2, 0) #define SDHCI_CDNS_HRS06_MODE_SD 0x0 #define SDHCI_CDNS_HRS06_MODE_MMC_SDR 0x2 #define SDHCI_CDNS_HRS06_MODE_MMC_DDR 0x3 #define SDHCI_CDNS_HRS06_MODE_MMC_HS200 0x4 #define SDHCI_CDNS_HRS06_MODE_MMC_HS400 0x5 #define SDHCI_CDNS_HRS06_MODE_MMC_HS400ES 0x6 /* SRS - Slot Register Set (SDHCI-compatible) */ #define SDHCI_CDNS_SRS_BASE 0x200 /* Cadence V4 PHY Setting*/ #define SDHCI_CDNS_PHY_DLY_SD_HS 0x00 #define SDHCI_CDNS_PHY_DLY_SD_DEFAULT 0x01 #define SDHCI_CDNS_PHY_DLY_UHS_SDR12 0x02 #define SDHCI_CDNS_PHY_DLY_UHS_SDR25 0x03 #define SDHCI_CDNS_PHY_DLY_UHS_SDR50 0x04 #define SDHCI_CDNS_PHY_DLY_UHS_DDR50 0x05 #define SDHCI_CDNS_PHY_DLY_EMMC_LEGACY 0x06 #define SDHCI_CDNS_PHY_DLY_EMMC_SDR 0x07 #define SDHCI_CDNS_PHY_DLY_EMMC_DDR 0x08 #define SDHCI_CDNS_PHY_DLY_SDCLK 0x0b #define SDHCI_CDNS_PHY_DLY_HSMMC 0x0c #define SDHCI_CDNS_PHY_DLY_STROBE 0x0d /* * The tuned val register is 6 bit-wide, but not the whole of the range is * available. The range 0-42 seems to be available (then 43 wraps around to 0) * but I am not quite sure if it is official. Use only 0 to 39 for safety. */ #define SDHCI_CDNS_MAX_TUNING_LOOP 40 struct sdhci_cdns_plat { struct mmc_config cfg; struct mmc mmc; void __iomem *hrs_addr; }; int sdhci_cdns6_phy_adj(struct udevice *dev, struct sdhci_cdns_plat *plat, u32 mode); int sdhci_cdns6_phy_init(struct udevice *dev, struct sdhci_cdns_plat *plat); int sdhci_cdns6_set_tune_val(struct sdhci_cdns_plat *plat, unsigned int val); #endif