3 commits

Author	SHA1	Message	Date
Yanhong Wang	22c2402737	cache: starfive: Add StarFive JH7110 support ... This adds support for the StarFive JH7110 SoC which also feature this SiFive cache controller. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Tested-by: Conor Dooley <conor.dooley@microchip.com>	2023-04-20 16:08:44 +08:00
Bin Meng	2fb91a2ea7	cache: sifive: Fix -Wint-to-pointer-cast warning ... The following warning is seen in cache-sifive-ccache.c in a 32-bit build: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Fix by casting it with uintptr_t. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>	2021-10-20 10:59:09 +08:00
Zong Li	43a2183928	cache: add sifive composable cache driver ... This driver is currently responsible for enabling all ccache ways. Composable cache could be configure as RAM or cache, we will use it as RAM at the beginning to put the u-boot SPL there. In u-boot proper phrase, we will use the composable cache as cache, and try to enable the cache ways. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>	2021-09-07 10:34:29 +08:00