Use i2c_set_bus_speed() in i2c_init() within the mxs i2c driver
to avoid duplication of code.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This patch implements the setup and retrieval functions for the I2C
bus speed on the MXS I2C IP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This patch pulls out the I2C speed setup from the i2c_init() call
and implements the bus configuration lookup table with register
values that needs to be programmed into the I2C IP to run at
particular speed.
This patch is a first step towards implementing run-time I2C bus
speed configuration for the MXS I2C IP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Some functions in the MXC i2c driver were not static, fix this by
making them so.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
We add a return code to wait_for_bb() to be able to report errors to the
callers properly. We in turn handle this new error code in i2c_read, i2c_write
and i2c_probe.
Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static?
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero when error.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Before this patch i2c_probe() always returned 0 and "i2c probe" command did not work properly.
Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call this function.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, "i2c md" and "i2c mw" command on U-Boot work properly on KZM-A9-GT board.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Correct BUSY bit define in ICSR from (1<<3) to (1<<4).
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and icch.
This patch add support for the extentin bits.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using
MXC_I2C_CLK on all imx systems using i2c.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.
All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.
Signed-off-by: Tom Warren <twarren@nvidia.com>
irq_wait function is not referred to from anywhere.
Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.
Upcoming Tegra30 port will use common code/defines/names where possible.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Various devices like EEPROMs require 2-byte address support to
be properly accessed. This patch adds this support for OMAP2/3/4
I2C controller driver.
I've tested it with EEPROM (16 bit address) and TPS65217 chip
(8 bit address) on TI Beaglebone board.
Unfortunately I don't have access to any compatible hardware
with 16bit data register so I can't test if those #ifdef
clauses really work.
CC: Tom Rini <trini@ti.com>
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
This adds multiple i2c channel support for I2C.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
This patch modifies the S3C I2C driver to suppport EXYNOS5.
The cahnges made to driver are as follows:
- I2C base address is passed as a parameter to many
functions to avoid multiple #ifdef
- Channel initialisation is moved to a commom funation
as it is required by i2c_init.
- Hardcoding for I2CCON_ACKGEN removed.
- Replaced printf with debug.
- Checkpatch issues resolved.
- Pinmux setting will be done in board/samsung/smdk5250/smdk5250.c
to avoid repeated setting of gpio lines, as it have multi bus support.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
struct s3c24x0_i2c is being moved to common local header file so that
the same can be used by s3c series and exynos series SoCs.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add support for calling a function that will toggle the
SCL line to return the bus to idle condition.
The actual toggling function is added in a later patch.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This helps in a multiple bus master environment which
is why I also added a wait for bus idle.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
imx_reset is only referenced once so
move to that location.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
imx_start is only referenced once so
move to that location.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
wait_for_sr_state returns i2sr on success
so no need to read again.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Not using udelay gives a more accurate timeout. The current implementation of udelay
in imx-common does not seem to wait at all for a udelay(1).
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
----
V2: Added WATCHDOG_RESET as suggested by Marek Vasut
add error message when stop fails
mxc_i2c: code i2c_probe as a 0 length i2c_write
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Initial code of i2c_read and i2c_write
is identical, move to subroutine.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Let's clear the sr register before waiting for
bit to be set, instead of clearing it after
hardware sets it. No real operational difference here,
but allows combining of i2c_imx_trx_complete and
i2c_imx_bus_busy in later patches.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Use tx_byte function instead of having 3 copies
of the code.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
This is always selected when CONFIG_I2C_MXC is
selected, so it adds no value.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory.
These devices require that the high byte of the internal address has to be
written first.
The mxs_i2c driver currently writes the address' low byte first.
The following patch fixes the byte order of the internal address that should
be written to the I2C device.
Signed-off-by: Torsten Fleischer <to-fleischer@t-online.de>
CC: Marek Vasut <marex@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Other then being very weird, this code was also wrong.
For example, say I set speed to 100K. I'll read back the speed
as 85937. But the speed is really 85937.5, so we I reset
the speed to 85937, I'll get 73660.7. After a couple of transactions
my speed is now exactly 68750 so it will remain there.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
