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3 commits

Author SHA1 Message Date
York Sun
dea8bd627c powerpc/85xx: Update fixed DDR3 timing table for P4080DS 
Most of time U-boot doesn't get an exact clock number. For example, clock
900MHz may be detected as 899.99MHz. 800MHz could be 799.99MHz. Update the
table to align the desired clocks in the middle.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
 2011-04-04 09:24:41 -05:00
Kumar Gala
5cfbc458d4 powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr init 
Rather than having #defines DATARATE_*_MHZ, lets just match what we do on
the SPD code and convert the DDR frequency into MHZ and just compare
with a constant.

Based on patch from Poonam Aggrwal.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
 2011-04-04 09:24:40 -05:00
York Sun
28a966715b Adding fixed sdram setting for cornet_ds board 
800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram
setting. SPD based parameters and fixed parameters can be toggled by hwconfig.
To use fixed parameters,

hwconfig=fsl_ddr:sdram=fixed

To use SPD parameters,

hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
 2010-10-20 02:38:39 -05:00