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3 commits

Author SHA1 Message Date
York Sun
00ec3fd211 Driver/DDR: Update DDR driver to allow non-zero base address 
The DRAM base has been zero for Power SoCs. It could be non-zero
for ARM SoCs. Use a macro instead of hard-coding to zero.

Signed-off-by: York Sun <yorksun@freescale.com>
 2013-11-25 11:43:47 -08:00
York Sun
9ac4ffbde1 Driver/DDR: Add Freescale DDR driver for ARM 
Make PowerPC specific code conditional so ARM SoCs can reuse
this driver. Add DDR3 driver for ARM.

Signed-off-by: York Sun <yorksun@freescale.com>
 2013-11-25 11:43:46 -08:00
York Sun
5614e71b49 Driver/DDR: Moving Freescale DDR driver to a common driver 
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>
 2013-11-25 11:43:43 -08:00
Renamed from arch/powerpc/cpu/mpc8xxx/ddr/main.c (Browse further)