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Author SHA1 Message Date
Chia-Wei Wang
9efcb10a09 riscv: Add AST2700 SoC initial platform support
AST2700 SoCs integrates a Ibex 32-bits RISC-V core as the boot MCU
for the first stage bootloader execution, namely SPL.

This patch implements the preliminary base to successfully run SPL
on this RV32-based MCU to the console banner message.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00