Commit graph

98975 commits

Author SHA1 Message Date
Tom Rini
e458e103d4 Merge patch series "64-bit U-Boot configuration without SPL"
Jeremy Compostella <jeremy.compostella@intel.com> says:

Introduces a new configuration option X86_RUN_64BIT_NO_SPL to allow
building U-Boot as a 64-bit binary without using the SPL (Secondary
Program Loader). The motivation is to simplify the boot process for
specific x86-based platforms that do not require SPL, such as those
booting directly from a 64-bit coreboot firmware.

Link: https://lore.kernel.org/r/87bjtyutkp.fsf@jcompost-mobl.amr.corp.intel.com
2025-04-04 16:49:59 -06:00
Jeremy Compostella
e892c98f7b configs: Add coreboot64-no-spl_defconfig for 64-bit X86 without SPL
Create a new defconfig file called `coreboot64-no-spl_defconfig`,
tailored specifically for 64-bit X86 architecture systems that operate
without the Secondary Program Loader (SPL). This configuration takes its
inspiration from `coreboot64_defconfig`..

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-04 12:26:36 -06:00
Jeremy Compostella
33d84771e9 Fix EFI boot file name definition for 64-bit x86
This change aligns the preprocessor directive with the standard
configuration flag used for detecting 64-bit x86 architecture.

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-04 12:26:36 -06:00
Jeremy Compostella
8eefb60e89 arch/x86/lib: Fix CONFIG_X86_64 usage in zimage.c
Correct the preprocessor directive used to check for 64-bit kernel
support in the `zboot_go` function. The code previously checked for
`CONFIG_X86_RUN_64BIT`, which is not the correct configuration option
for determining if the kernel should run in 64-bit mode. The correct
option is `CONFIG_X86_64`.

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-04 12:26:36 -06:00
Jeremy Compostella
e4246c1521 arch/x86/cpu: Call x86_cpu_reinit_f for 64-bits
As both CONFIG_X86_RUN_64BIT and X86_RUN_64BIT_NO_SPL cases run U-Boot
in 64-bit mode with the CPU fully initialized already.

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-04 12:26:35 -06:00
Jeremy Compostella
1878c32c4d arch/x86: Add 64-bit U-Boot configuration without SPL
This commit introduces a new configuration option X86_RUN_64BIT_NO_SPL
to allow building U-Boot as a 64-bit binary without using the SPL
(Secondary Program Loader). The motivation is to simplify the boot
process for certain x86-based platforms that do not require SPL, such as
those booting directly from a 64-bit coreboot firmware.

This update revises the `X86_RUN_64BIT` configuration to more accurately
describe its role as "32-bit SPL followed by 64-bit U-Boot." It
clarifies the sequence of operations during the boot process, where the
system transitions from a 32-bit SPL (Secondary Program Loader) to the
main 64-bit U-Boot.

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-04 12:26:35 -06:00
Tom Rini
c5032bf3f6 Merge patch series "cmd: fuse: Introduce fuse writebuff sub-system and clean up"
Harsha Vardhan V M <h-vm@ti.com> says:

This patch series introduces the fuse writebuff sub-system command and
makes improvements to the existing fuse implementation by removing the
custom string functions. The patches are required to be applied in
sequence.

The series consists of the following changes:
Patch 1 removes custom string functions and replaces them with standard
string functions.
Patch 2 introduces fuse.rst documentation for fuse commands.
Patch 3 introduces the fuse writebuff sub-system command, allowing to
write a structured buffer in memory to fuses, and implementing the
necessary function calls.
Patch 4 enables the fuse sub-system in the K3 platform.
Patch 5 updates the fuse.rst documentation to include details about the
new fuse writebuff command.

These changes aim to improve the fuse sub-system by the removal of
custom string functions and the addition of the fuse writebuff
command improves fuse programming workflows by allowing to write a
structured buffer in memory to efuses.

Link: https://lore.kernel.org/r/20250319084714.335777-1-h-vm@ti.com
2025-04-04 12:25:11 -06:00
Harsha Vardhan V M
9f6b1ff8d0 doc: cmd: Add fuse writebuff cmd documentation
Add fuse writebuff sub-system command documentation.

Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
2025-04-04 12:25:02 -06:00
Harsha Vardhan V M
ed5f2e5bed drivers: k3_fuse: Add fuse sub-system func calls
Add K3_FUSE config option to add and enable fuse sub-system
implementation function calls.

Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-04 12:25:02 -06:00
Harsha Vardhan V M
578e7882bf cmd: fuse: Add fuse writebuff sub-system command
Add CMD_FUSE_WRITEBUFF config option to add and enable fuse writebuff
sub-system command. Add fuse_writebuff function to be invoked on
writebuff command.

Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-04 12:25:02 -06:00
Harsha Vardhan V M
833c05ea27 doc: cmd: Add documentation for fuse command
Add documentation for the 'fuse' sub-system commands in
doc/usage/cmd/fuse.rst file.
Remove doc/README.fuse file.

Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
2025-04-04 12:25:02 -06:00
Harsha Vardhan V M
005eeda378 cmd: fuse: Remove custom string functions
Remove custom string functions and replace them with normal string
functions. Remove the custom strtou32 and replace it with
simple_strtoul.

Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-04 12:25:02 -06:00
Ilias Apalodimas
a5ac47911a arm64: Fix page permissions for platforms running at EL2
We currently set both and print both PXN and UXN bits when removing
execution for pages. This happens even in the existing per platform
definitions of 'struct mm_region'.

That's not entirely correct though. For stage-1 translations, if a
platform runs on a translation regime with a single privilege level or the
the translation regime supports two privilege levels and we are not
in EL1&0 with HCR_EL2.{NV, NV1} = {1, 1} only BIT54 (XN) is needed
and BIT53(PXN) is reserved 0.

Currently we support Non-Secure EL2, Non-secure EL2&0 and Non-secure
EL1&0.

We already have get_effective_el() which returns 1 if we are
- Running in EL1 so we assume an EL1 translation regime but without
  checking HCR_EL2.{NV, NV1} != {1,1}
- Running in EL2 with HCR_EL2.E2H = 1

The only problem with the above is that if we are in EL1&0 and
HCR_EL2.{NV1, NV} == {1, 1}, then
- Bit[54] holds the PXN instead of the UXN
- The Effective value of UXN is 0
- Bit[53] is RES0

So let's re-use that function and set PXN only when we are in
and EL[2|1]&0 translation regime.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-04 12:24:56 -06:00
Tom Rini
848f7ffc64 - check interface before comparing it in set_dfu_alt_info() to avoid hard crash on capsule update
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmfvmpcACgkQd9zb2sjI
 SdHVeQ//Uu1ZJMQd/95pP1CiDjG0SnNcqQO8kefbfXV0Bk8nSWTpBvnrUgWjsw7a
 bjtFqw4n58zpEIhLJXFxLBmz9Jyjg93QMT6sRNT4XdngKRQTJGJPSCBNefJi+BGq
 XbeZFNOHKs+x4VHpeRsIUxXI4eOLDgCbaHYRGKA4OF6+MXtK1G0CRFARu2q7ylPv
 IzYzii+Hfn8r0PbZWQhk+hH6/7SEQpt28hzk47OwfXwbENJ4suq4tDDM5wQ6bUnU
 pzY+RD3ZlGLLzWVyQgr/7unbM0QiMNhDQ2yk1ZNI4JjcELtRDSTfOue/0OyH6ffC
 r8Ki+mdYUA/CAPZ8aZtu2sV9vrGZ9evMqBlgiZByrmHw7ykWjtCLQGbJiomM53ma
 fxRXzpcFVsEw9vAgq6oxc0Y/Oy6OP4n4dZQP0SjTDJtUzvyoUZbZdxP5D4wc1HKX
 qQ8mYcd/K66X69rkZqlFJelDL9IkNRpZK3JPHe+47Ui2f6Ftjp/wqu3ZTlGK7O9L
 TjKx30sNvDDI9oAEWUoE018LkePGmOs9I/pDn1d1e9lQWjbV6ucuXWxMabwHP6UP
 hmBXOywAahpOtLrAb3UenbzQIgIIc8jh1Pe7uWdUlrkpjkzgpR4MRAn4+xveBmH9
 E5+Rm4D8yI9UD0/9Kad8i41qZpYTRJQMdJkbqE347ZJQAxiM4pU=
 =Fl5Z
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20250404' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Check interface before comparing it in set_dfu_alt_info() to avoid
  hard crash on capsule update
2025-04-04 09:02:37 -06:00
Neil Armstrong
c5fd2c7ac7 board: libre-computer: check interface before comparing it in set_dfu_alt_info()
When set_dfu_alt_info() is called, interface can be NULL when called for
the EFI capsule, so check it before calling it with strcmp().

Fixes: 12ea40d29d ("ARM: meson: add support for Libre Computer aml-s905d3-cc")
Fixes: 9e6e6b034b ("ARM: meson: add support for Libre Computer aml-a311d-cc")
Fixes: 75c87c6cbc ("board: libre-computer: aml-s805x-cc: Enable capsule updates")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/20250403-u-boot-fix-set-dfu-alt-info-interface-v1-1-1fdd12463186@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-04 10:37:40 +02:00
Tom Rini
1aa8b03c01 Merge patch series "membuff: Add tests and update to support a flag for empty/full"
Simon Glass <sjg@chromium.org> says:

The membuff implementation curently has no tests. It also assumes that
head and tail can never correspond unless the buffer is empty.

This series provides a compile-time flag to support a 'full' flag. It
also adds some tests of the main routines.

The data structure is also renamed to membuf which fits better with
U-Boot.

There may be some cases in the code which could be optimised a little,
but the implementation is functional.

Link: https://lore.kernel.org/r/20250318152059.1464369-1-sjg@chromium.org
2025-04-03 16:54:59 -06:00
Simon Glass
da8694a7d2 membuf: Minor code-style improvements
Show the start in end in the comment. Comment a missing variable in
membuf_readline() and fix its line length.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 16:54:49 -06:00
Simon Glass
142a3cb63c membuf: Add some tests
Add tests for the membuf implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 16:54:49 -06:00
Simon Glass
44e763bd66 membuf: Correct implementation of membuf_dispose()
This should free the pointer, not the address of the pointer. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 16:54:49 -06:00
Simon Glass
f48f1705c3 membuf: Include stdbool
This uses a bool type so include the required header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 16:54:49 -06:00
Simon Glass
68b0af2127 membuf: Rename struct
Rename the struct to match the function prefix and filenames.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 16:54:49 -06:00
Simon Glass
9ca1789ff0 membuff: Rename the files to membuf
Rename the C and header files to use the membuf basename, to match the
functions.

Add a MAINTAINERS entry while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 16:54:49 -06:00
Simon Glass
4662e5286a membuff: Rename functions to have membuf_ prefix
The double 'f' is not necessary and is a bit annoying as elsewhere in
U-Boot we use 'buf'. Rename all the functions before it is used more
widely.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 16:54:49 -06:00
Tom Rini
1f2a3d066c Merge patch series "x86: Improve operation under QEMU"
Simon Glass <sjg@chromium.org> says:

U-Boot can start and boot an OS in both qemu-x86 and qemu-x86_64 but it
is not perfect.

With both builds, executing the VESA ROM causes an intermittent hang, at
least on some AMD CPUs.

With qemu-x86_64 kvm cannot be used since the move to long mode (64-bit)
is done in a way that works on real hardware but not with QEMU. This
means that performance is 4-5x slower than it could be, at least on my
CPU.

We can work around the first problem by using Bochs, which is anyway a
better choice than VESA for QEMU. The second can be addressed by using
the same descriptor across the jump to long mode.

With an MTRR fix this allows booting into Ubuntu on qemu-x86_64

In v3 some e820 patches are included to make booting reliable and avoid
ACPI tables being dropped. Also, several MTTR problems are addressed, to
support memory sizes above 4GB reliably.

Link: https://lore.kernel.org/all/20250315142643.2600605-1-sjg@chromium.org/
2025-04-03 11:43:38 -06:00
Simon Glass
a3d255d996 test: Add a test for booting Ubuntu 24.04
Now that U-Boot can boot this quickly, using kvm, add a test that the
installer starts up correctly.

Use the qemu-x86_64 board in the SJG lab.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:43:22 -06:00
Simon Glass
59001e758a acpi: Support checking checksums
When the ACPI tables come from an earlier bootloader it is helpful to
see whether the checksums are correct or not. Add a -c flag to the
'acpi list' command to support that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:43:22 -06:00
Simon Glass
9e98664cdb test: acpi: Correct memory leaks
Free the memory used in tests to avoid a leak. Also unmap the addresses
for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2025-04-03 11:43:22 -06:00
Simon Glass
e53d631f83 acpi: Add a checksum to the DMAR table
This table lacks a correct checksum at present, so fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2025-04-03 11:43:22 -06:00
Simon Glass
698c00e0b7 sandbox: acpi: Correct mapping in FADT
The values in the FADT are pointers so should not go through sandbox's
normal addr<->pointer mapping. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:43:22 -06:00
Simon Glass
bac7ca510e sandbox: acpi: Avoid a warning about FADT
Add a condition for sandbox, to match that of x86, to avoid the warning
"FADT not ACPI-hardware-reduced-compliant".

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:43:22 -06:00
Simon Glass
951d1faa54 boot: Support IO UARTs for earlycon and console
Update the string to take account of UARTs which are connected on I/O
ports, as on x86.

Fix a typo in an error message in the same command, while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:43:22 -06:00
Simon Glass
199648bac1 boot: Handle running out of labels
If only a single label is provided in the list, bootdev_next_label()
does not operate correctly and reads beyond the end of the pointer list.

Fix this by adding a new check. Also add a note to convert this array
to an alist

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:43:22 -06:00
Simon Glass
6acb0d28b0 boot: Consider non-bootable partitions
Any 'bootable' flag in a DOS partition causes boostd to only scan
bootable partitions for that media. This can mean that extlinux.conf
files on the root disk are missed.

Put this logic behind a flag and update the documentation.

For now, the flag is enabled, to preserve the existing behaviour of
bootstd which is to ignore non-bootable partitions so long as there is
at least one bootable partition on the disk.  Future work may provide a
command (or some other mechanism) to control this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
8d6097d300 acpi: Mark struct acpi_rsdp as packed
At present the size of this struct is too large on 64-bit machines.
Annotate it with __packed to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
c4af65b3ba x86: Support a 64-bit ramdisk address
Add some missing pieces to bootparams so that a 64-bit ramdisk address
can be used. Tidy up the logging while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
15ca25e31e x86: emulation: Support BLOBLIST_TABLES properly
The existing QEMU implementation mostly ignored BLOBLIST_TABLES and
allocates the bulk of the tables with malloc(). Update it to place all
tables in the bloblist. Since QEMU declares a size of 128KB regardless
of the size of its tables, this requires a larger bloblist.

Fix up the e820 table to handle this, keeping the old code as an option
for now, to assist with any future bug-fixing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
b03021f56a x86: qemu: Use the new e820 API
Move over to use this API before making the code even more complicated.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
e15db02362 x86: Add a new API for e820
The existing mechanism is pretty painful as it requires manual
calculations for anything but a trivial setup.

Add a new API for adding e820 entries.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
1e559930f7 x86: e820: Add a function to dump the e820 table
There is already code for this in zimage. Move it to the e820 file so
it can be used elsewhere.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
9a04b9a439 test/py: Allow tests to be filtered by role
Some test can only be run by a particular board in a lab, e.g. because
they are loaded with an OS image used by the test. Add a way to specify
this in tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
4c6774c606 test/py: Add a helper to send characters
The existing run_command() method is not great for sending things other
than U-Boot commands. Add a helper for sending arbitrary strings as well
as control characters.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-03 11:41:55 -06:00
Simon Glass
0b9e517aaf test/py: Correct sizing of created disks
At present the disks end up being 1MB shorter than they should be,
since dd truncates by default.

Move the code into a function and update it to avoid truncation.

This resolves various warnings when running sandbox tests, of the form:

   mmc_bread() MMC: block number 0x9801 exceeds max(0x9800)

caused by the FAT partition being scanning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
b23f0a42c3 x86: qemu: Support environment and cat command
Add support for an environment stored in the first partition of the
disk, which is assumed to hold a FAT filesystem.

Support the 'cat' command as it is useful for looking at extlinux.conf
files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
790baef3b9 x86: emulation: Set an MTRR for the RAM
QEMU likes to have an MTRR set up, just like real machines. Add an MTRR
which covers the total RAM size.

This does nothing on machines without MTRRs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
66c9ade35b x86: Allow adding non-aligned size for MTRR
At present mtrr_add_request() requires that the size is a power of two.
This is too limiting for machines with 4GB (or more) of RAM, since they
often must take account of a memory hole at 3GB.

Update the function to automatically deal with an unaligned size, using
more MTRRs as required.

The algorithm is taken from coreboot commit 60bce10750

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
a9d106421d x86: Correct msr operation on amd64
The CONFIG option is no-longer correct since we can have SPL and PPL
with different bitness.

Fix this and sync up with Linux 6.13 in this area, since this is where
the code came from many years ago.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
21feb3404e x86: Update cpuid_eax et al to work on amd64
The existing functions work but the register clobbers are wrong, so
strange bugs results.

The original functions were taken from a very old version of Linux.
Update them from Linux 6.13

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
5450836115 x86: Update mtrr command to support 64-bit values
The MTRR registers have 64-bit values. Update the command to use 64-bit
values so that memory larger than 4GB can be handled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
8bd563707d x86: Add functions to convert between mtrr size and mask
Rather than repeating the same code in several places, add some
functions which can do the conversion.

Use the cpu_phys_address_size() function to obtain the physical-address
size, since it is more reliable with kvm, where the host CPU may have a
different value from the emulation CPU.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Simon Glass
5ee60f3afa x86: Support CPU functions in long mode
At present it is not possible to find out the physical-address size in
long mode, so a predefined value is used.

Update the macros to support this properly, since it is important when
programming MTRRs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00