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arc: libgcc: Import __udivdi3 & __udivmoddi4 to allow 64-bit division
As reported by Kever here [1] we were unable to compile 64-bit division
code due to missing definition of __udivdi3().
Import its implementation and __udivmoddi4() as its direct dependency
from today's libgcc [2].
[1] https://patchwork.ozlabs.org/patch/1146845/
[2] 5d8723600b
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
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@ -158,3 +158,78 @@ __umodsi3(long a, long b)
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{
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return udivmodsi4(a, b, 1);
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}
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UDWtype
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__udivmoddi4(UDWtype n, UDWtype d, UDWtype *rp)
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{
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UDWtype q = 0, r = n, y = d;
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UWtype lz1, lz2, i, k;
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/*
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* Implements align divisor shift dividend method. This algorithm
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* aligns the divisor under the dividend and then perform number of
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* test-subtract iterations which shift the dividend left. Number of
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* iterations is k + 1 where k is the number of bit positions the
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* divisor must be shifted left to align it under the dividend.
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* quotient bits can be saved in the rightmost positions of the
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* dividend as it shifts left on each test-subtract iteration.
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*/
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if (y <= r) {
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lz1 = __builtin_clzll(d);
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lz2 = __builtin_clzll(n);
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k = lz1 - lz2;
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y = (y << k);
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/*
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* Dividend can exceed 2 ^ (width - 1) - 1 but still be less
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* than the aligned divisor. Normal iteration can drops the
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* high order bit of the dividend. Therefore, first
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* test-subtract iteration is a special case, saving its
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* quotient bit in a separate location and not shifting
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* the dividend.
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*/
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if (r >= y) {
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r = r - y;
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q = (1ULL << k);
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}
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if (k > 0) {
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y = y >> 1;
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/*
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* k additional iterations where k regular test
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* subtract shift dividend iterations are done.
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*/
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i = k;
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do {
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if (r >= y)
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r = ((r - y) << 1) + 1;
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else
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r = (r << 1);
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i = i - 1;
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} while (i != 0);
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/*
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* First quotient bit is combined with the quotient
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* bits resulting from the k regular iterations.
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*/
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q = q + r;
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r = r >> k;
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q = q - (r << k);
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}
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}
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if (rp)
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*rp = r;
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return q;
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}
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UDWtype
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__udivdi3(UDWtype n, UDWtype d)
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{
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return __udivmoddi4(n, d, (UDWtype *)0);
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}
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