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mtd: spi-nor: Move SR3 WPS bit definition in the correct location

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Move the SR3 bit definition in the right place. Fix
what is likely a rebase artifact. No functional change.

Fixes: 215f1d5794 ("mtd: spi-nor: Clear Winbond SR3 WPS bit on boot")
Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut 2024-10-15 22:14:53 +02:00 • committed by Tom Rini
parent 7f45377152
commit f83e36fd83
1 changed files with 3 additions and 3 deletions
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6
include/linux/mtd/spi-nor.h
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@ -182,15 +182,15 @@
/* Status Register 2 bits. */
#define SR2_QUAD_EN_BIT7 BIT(7)
/* Status Register 3 bits. */
#define SR3_WPS BIT(2)
/*
* Maximum number of flashes that can be connected
* in stacked/parallel configuration
*/
#define SNOR_FLASH_CNT_MAX 2
/* Status Register 3 bits. */
#define SR3_WPS BIT(2)
/* For Cypress flash. */
#define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */
#define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */